Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
1999-10-27
2003-04-29
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257S797000, C257S208000, C257S211000, C257S207000, C257S734000, C257S776000
Reexamination Certificate
active
06555922
ABSTRACT:
TITLE OF THE INVENTION SEMICONDUCTOR DEVICE HAVING A BONDING PAD
BACKGROUND OF THE INVENTION
The present invention generally relates to semiconductor devices and more particularly to a semiconductor device having a mark pattern or a monitor pattern for process control.
In a semiconductor integrated circuit in which a number of active devices such as MOS transistors are integrated on a common semiconductor substrate, it is generally practiced to provide various mark patterns and monitor patterns on the semiconductor substrate for the purpose of process control such as positional alignment or detection of alignment error.
As these mark patterns and monitor patterns are used only during the fabrication process of the semiconductor integrated circuit, the mark patterns and the monitor patterns have conventionally been formed on the dicing lines of the semiconductor substrate, so that the area of the semiconductor substrate is not unnecessarily occupied by the mark patterns and monitor patterns. The patterns thus formed on the dicing lines are removed at the time of dicing of the semiconductor substrate into individual semiconductor chips.
On the other hand, the demand for the positional alignment is becoming more and more rigorous in the fabrication process of recent ultra-fine semiconductor devices called “submicron devices,” “sub-half-micron devices” or “sub-quarter-micron devices.” Further, the fabrication process of such recent ultra-fine semiconductor devices requires control of increased number of process parameters, such as pattern size control, etching process control, chemical mechanical polishing (CMP) process control, film quality monitoring, short-circuit detection, contact resistance monitoring, transistor operation monitoring, LSI operation monitoring, and the like.
With such an increase in the number of the process parameters to be controlled, it should be noted that there also occurs an increase in the number of the mark patterns and the monitor patterns which are provided on the semiconductor substrate for the purpose of controlling the process parameters.
As a result of the foregoing increase in the number of the mark patterns and monitor patterns on a semiconductor substrate, there can be a case in which the area of the dicing line, on which a mark pattern or a monitor pattern is to be formed, is already occupied by mark patterns or monitor patterns, and that there is no suitable space available in the vicinity of the existing mark pattern or monitor pattern.
While it is certainly possible to provide some of the mark patterns and monitor patterns inside the area of a semiconductor integrated circuit, such mark patterns and monitor patterns formed inside the semiconductor integrated circuit cause a decrease in the available area of the semiconductor substrate for the formation of various active devices or interconnection patterns of the semiconductor integrated circuit.
Further, such conventional semiconductor integrated circuits have a drawback, due to the fact that the dicing lines generally have a depressed surface on the semiconductor substrate, in that the result of the monitoring process of a parameter, such as the measurement of the thickness of a film, may be different from the result of the monitoring process of the same parameter conducted outside.the dicing line. When such a discrepancy exists between the result of the monitoring process conducted by a monitoring pattern and the actual process, the process control of the semiconductor fabrication process becomes unreliable.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a novel and useful semiconductor device wherein the foregoing problems are eliminated.
Another and more specific object of the present invention is to provide a semiconductor device including a large number of process control patterns for facilitating the fabrication of the semiconductor device with an improved yield.
Another object of the present invention is to provide a semiconductor device, comprising:
a substrate;
an active device formed on said substrate;
a bonding pad formed on said substrate; and
a mark region formed on said substrate right underneath said bonding pad, such that said mark region is covered by said bonding pad.
Another object of the present invention is to provide a semiconductor device, comprising:
a substrate;
an active device formed on said substrate;
a bonding pad formed on said substrate; and
a monitoring region formed on said substrate under said bonding pad, such that said monitoring region is covered by said bonding pad.
According to the present invention, the problem of the mark region or monitoring region occupying the area of the semiconductor device unnecessarily, is successfully avoided. As a result of the present invention, the number of the mark patterns and the monitoring patterns on the substrate can be increased, and the fabrication process of the semiconductor device is controlled more closely. As the bonding region is formed inside a chip region, which is defined on the substrate by a dicing line, the monitoring of the fabrication process by using such a monitoring region provides information on the state of the process more accurately than in the conventional case of using the monitoring patterns that are formed in the dicing line.
Other objects and further features of the present invention will become apparent from the following detailed description when read in conjunction with the attached drawings.
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Armstrong Westerman & Hattori, LLP
Fujitsu Limited
Williams Alexander O.
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