I2C bus controlling method

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

Reexamination Certificate

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Details

C710S110000, C710S307000, C710S008000, C710S301000, C370S401000, C370S463000, C340S870030, C713S151000, C713S300000

Reexamination Certificate

active

11169655

ABSTRACT:
A module has an IC for communication control (a PHY unit) and an EEPROM (or MCU) connected to the PHY unit via an I2C bus. When a software reset is triggered while the PHY unit reads non-volatile register (NVR) data from the EEPROM (or MCU) via the I2C bus, the module causes an I2C interface circuit of the PHY unit to forcedly toggle and send a clock signal to the EEPROM (or MCU) via the I2C bus to make the EEPROM (or MCU) recognize that interrupted communications via the I2C bus are pseudo completed.

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The I2C Bus Specification Version 2.1—Jan. 2000—pp. 1 and 7.

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