I.sup.2 L Semiconductor memory circuit device

Details I.sup.2 L Semiconductor memory circuit device I.sup.2 L Semiconductor memory circuit device

1980-11-26

1983-02-15

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Semiconductive

365104, G11C 1140

Patent

active

043744311

ABSTRACT:
A semiconductor memory circuit device is disclosed. The semiconductor memory circuit device is conventionally comprised of a plurality of memory-cell arrays. Each of the memory-cell arrays is conventionally provided with a plurality of IIL memory cells, a pair of positive word line and negative work line and further a plurality of bit lines. In the semiconductor memory circuit device, at least one means for discharging electric charges is newly incorporated with each negative word line. Said means becomes active only when the corresponding memory-cell array changes from selection status to non-selection status.

REFERENCES:
patent: 4228525 (1980-10-01), Kawarada

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