I/O translation lookaside buffer performance

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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Reexamination Certificate

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07636832

ABSTRACT:
Methods and apparatus to provide improved input/output (I/O) address translation lookaside buffer performance are described. In one embodiment, one or more entries of a cache (e.g., an I/O address translation lookaside buffer) are locked in response to a request to lock the one or more entries. Other embodiments are also described.

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