I/O transactions on a low pin count bus

Details I/O transactions on a low pin count bus I/O transactions on a low pin count bus

1997-09-24

2000-10-10

Butler, Dennis M.

Electrical computers and digital data processing systems: input/

Input/output data processing

G06F 1100

Patent

active

061311278

ABSTRACT:
A system having a bus coupled to a host and a peripheral controller device each coupled to a bus. The bus includes a plurality of general purpose signal lines to carry time-multiplexed address, data, and control information. The peripheral controller device communicates with the host over the bus to control devices such as parallel port controllers, serial port controllers, super I/O controllers, floppy disk controllers, keyboard controllers and memory devices.

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