Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral adapting
Reexamination Certificate
2005-02-15
2005-02-15
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral adapting
C710S002000, C710S008000, C710S305000, C710S306000
Reexamination Certificate
active
06857033
ABSTRACT:
An I/O node for a computer system including an integrated graphics engine and integrated I/O hub. An input/output node that is implemented on an integrated circuit chip includes a transceiver unit, a graphics engine and an I/O hub. The transceiver unit may receive and transmit packets on a point-to-point link of a packet interface. The graphics engine may be coupled to receive graphics packets received by the transceiver unit and may render digital image information in response to receiving the graphics packets. The I/O hub may be coupled to receive I/O packets corresponding to packets received by the transceiver unit and may initiate bus cycles corresponding to the I/O packets upon a peripheral bus. The packet interface link may be a point-to-point HyperTransport™ link including a first and second set of uni-directional wires which may convey control and data packets over the same wires.
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Gulick Dale E.
Hewitt Larry D.
Mergard James
Advanced Micro Devices , Inc.
Curran Stephen J.
Huynh Kim
Kivlin B. Noäl
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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