I/O multiplexer and pin controller with serial and parallel...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S317000, C710S038000, C370S391000

Reexamination Certificate

active

06978340

ABSTRACT:
A controller12has an I/O crossover switching network14, an optional I/O network expansion16, a plurality of serial I/O shifters18, a clock generator20and I/O control logic22. The I/O crossover-switching network14is also referred to as an I/O multiplexer. Serial data may be transferred between a serial I/O shifter and an external device by way of a dedicated serial data pin (SDATA)24or an optional alternate pathway26which uses one of a plurality of parallel pins28. The optional alternate pathway26can be used when pins28are unavailable or to reduce the number of pins on the device12. The controller is shown to communicate with an external device30also having parallel pins32. While a single device30is shown, the external device30can be any number of a plurality of devices having serial and parallel signal pathways that is controlled by the microprocessor10of the present invention.

REFERENCES:
patent: 5734920 (1998-03-01), Gotoh et al.
patent: 5737522 (1998-04-01), Matsumoto
patent: 5987623 (1999-11-01), Ushida
patent: 6138185 (2000-10-01), Nelson et al.
patent: 6301509 (2001-10-01), Obata
patent: 6504854 (2003-01-01), Hofmann et al.
patent: 6606678 (2003-08-01), Nakamura
patent: 6674303 (2004-01-01), Morse et al.
patent: 6745271 (2004-06-01), Toda
patent: 2001/0025332 (2001-09-01), Wang et al.

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