I/O descriptor cache for bus mastering I/O controllers

Details I/O descriptor cache for bus mastering I/O controllers I/O descriptor cache for bus mastering I/O controllers

2004-08-11

2009-12-15

Hafiz, Tariq R. (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output command process

C710S004000, C710S030000, C710S033000, C710S036000, C710S052000, C710S064000, C710S313000, C710S315000, C711S113000

Reexamination Certificate

active

07634587

ABSTRACT:
One embodiment of the present invention provides a system that includes an I/O descriptor cache that is accessed by a bus mastering I/O controller. The I/O descriptor cache stores descriptors that describe data to be transferred during corresponding I/O operations. The system also includes an I/O controller configured to control one or more I/O devices. This I/O controller is configured to access I/O descriptors stored in the I/O descriptor cache without having to access the main memory, thereby conserving I/O bandwidth and power.

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“Universal Serial Bus Specification,” Revision 2.0 (Apr. 27, 2000), pp. 1-2.

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