I/O cache with user configurable preload

Details I/O cache with user configurable preload I/O cache with user configurable preload

1999-01-26

2002-04-09

Nguyen, Hiep T. (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S118000

Reexamination Certificate

active

06370614

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of data storage in computer systems, and more particularly to a user-configurable cache memory implemented in a high-speed storage.
BACKGROUND OF THE INVENTION
Many modern computer systems use input/output (I/O) buffering to speed access to data stored in mass storage media such as disk or tape drives. The idea behind I/O buffering is to store frequently accessed data from mass storage in a relatively small memory that can be accessed more quickly than the mass storage itself. Two common types of I/O buffering are operating system (OS) cache and self-buffered mass storage. In an OS cache, the operating system reserves a portion of system memory to buffer data obtained from mass storage. The OS responds to mass storage access requests by determining whether the data sought to be accessed is buffered in the reserved portion of system memory and, if so, performing the requested access in system memory without accessing mass storage.
OS cache has a number of disadvantages. First, because the system memory used for data buffering is usually volatile, the OS cache contents are lost when the computer system is powered down. Consequently, the OS cache must be reloaded each time the computer system is booted. Among other things, this makes the OS cache unsuitable to source boot files during system startup. Another disadvantage of OS cache is that the amount of system memory reserved for data buffering in the OS cache usually is limited because system memory is needed for other purposes, such as providing space for user applications. In some cases, the amount of system memory reserved for data buffering may be dynamically reduced in response to requests to provide system memory for other purposes. Yet another disadvantage of OS cache is that the algorithm used to control what data is stored and what data is overwritten in the data buffer usually does not support user-preferences to cache certain types or groups of files.
In a self-buffered mass storage, the mass storage hardware includes a relatively small buffer memory that is used to hold the contents of recently accessed regions of the mass storage media. When an access request (e.g., a read or write request) is received in the mass storage, control circuitry for the mass storage first determines whether the access hits the contents of the buffer memory. If so, the access occurs in the buffer memory, potentially saving the time required to access the mass storage media itself. Unfortunately, self-buffered mass storage suffers from many of the same disadvantages as OS cache. Specifically, the contents of the buffer memory are usually lost on power down, and the algorithm used to control what data is stored in the data buffer typically does not support user-preferences. Another disadvantage of self-buffered mass storage is that, because the buffer memory is used only for accesses to the associated mass storage, data from other I/O sources are not buffered. For example, the buffer memory of a self-buffered mass storage device typically cannot be used to buffer data from other non-buffered mass storage devices in the computer system or data from mass storage devices outside the computer system such as network servers.
SUMMARY OF THE INVENTION
A method and apparatus for accessing data in a computer system is disclosed. In response to request to access a storage location in a mass storage device, it is determined whether data from the storage location is cached in a primary cache maintained in a system memory of the computer system. Responsive to determining that the data from the storage location is not cached in the primary cache, it is determined whether the data from the storage location is cached in a secondary cache of the computer system. If the data from the storage location is determined to be cached in the secondary cache, a device driver is executed to access the data in the secondary cache.
Other features and advantages of the invention will be apparent from the accompanying drawings and from the detailed description that follows below.


REFERENCES:
patent: 3609665 (1971-09-01), Kronies
patent: 3806888 (1974-04-01), Brickman et al.
patent: 4020466 (1977-04-01), Cordi et al.
patent: 4215400 (1980-07-01), Denko
patent: 4295205 (1981-10-01), Kunstadt
patent: 4342079 (1982-07-01), Stewart et al.
patent: 4435775 (1984-03-01), Brantingham et al.
patent: 4500954 (1985-02-01), Duke et al.
patent: 4637024 (1987-01-01), Dixon et al.
patent: 5128810 (1992-07-01), Halford
patent: 5131089 (1992-07-01), Cole
patent: 5146576 (1992-09-01), Beardsley
patent: 5218689 (1993-06-01), Hotle
patent: 5226168 (1993-07-01), Kobayashi et al.
patent: 5263142 (1993-11-01), Watkins et al.
patent: 5287457 (1994-02-01), Arimilli et al.
patent: 5291584 (1994-03-01), Challa et al.
patent: 5293622 (1994-03-01), Nicholson et al.
patent: 5359713 (1994-10-01), Moran et al.
patent: 5396596 (1995-03-01), Hashemi et al.
patent: 5420998 (1995-05-01), Horning
patent: 5437018 (1995-07-01), Kobayashi et al.
patent: 5448719 (1995-09-01), Schultz et al.
patent: 5459850 (1995-10-01), Clay et al.
patent: 5483641 (1996-01-01), Jones et al.
patent: 5493574 (1996-02-01), McKinley
patent: 5515525 (1996-05-01), Grynberg et al.
patent: 5519853 (1996-05-01), Moran et al.
patent: 5551000 (1996-08-01), Tan et al.
patent: 5555402 (1996-09-01), Tuma et al.
patent: 5594885 (1997-01-01), Lautzenheiser
patent: 5603011 (1997-02-01), Piazza
patent: 5633484 (1997-05-01), Zancho et al.
patent: 5657470 (1997-08-01), Fisherman et al.
patent: 5673394 (1997-09-01), Fenwick et al.
patent: 5680570 (1997-10-01), Rantala et al.
patent: 5680573 (1997-10-01), Rubin et al.
patent: 5692190 (1997-11-01), Williams
patent: 5694570 (1997-12-01), Beardsley et al.
patent: 5712811 (1998-01-01), Kim
patent: 5732267 (1998-03-01), Smith
patent: 5737619 (1998-04-01), Judson
patent: 5745773 (1998-04-01), Mizuta
patent: 5778418 (1998-07-01), Auclair et al.
patent: 5787470 (1998-07-01), DeSimone et al.
patent: 5802566 (1998-09-01), Hagersten
patent: 5895487 (1999-04-01), Boyd et al.
patent: 6003115 (1999-12-01), Spear et al.
International Search Report in connection with International Application No. PCT/US00/02156 (6 pages).
“The I/O System”, Inside Windows NT Second Edition, Microsoft Press, David A. Solomon, pp. v-xiv, 325-393, 1998.
“Filter Drivers”, Windows NT File System Internals A Developer's Guide, Rajeev Nagar, O'Rielly & Associates, Inc., pp. vii-x, 615-667, 1997.

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