Electronic digital logic circuitry – Interface – Supply voltage level shifting
Reexamination Certificate
2005-01-04
2005-01-04
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Interface
Supply voltage level shifting
C326S057000, C326S112000, C326S119000, C326S121000
Reexamination Certificate
active
06838906
ABSTRACT:
A driver structure for an I/O buffer circuit is disclosed. The driver structure includes a pre-push-pull driver and a post-push-pull driver. A delay circuit along is connected in series between the input signals of the pre-push-pull driver and the post-push-pull driver. After a delay time following a transition of the input signal, the circuit operation of the post-push-pull driver is turned off before the amplitude of the output signal reaches its maximum overshooting. This changes the output conductivity to inhibit the overshooting in the output signal, preventing power bounce and ground bounce at the receiving end.
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patent: 6066958 (2000-05-01), Taniguchi et al.
patent: 6236234 (2001-05-01), Yagi
patent: 6236237 (2001-05-01), Wong et al.
patent: 6351148 (2002-02-01), Lee
patent: 6535020 (2003-03-01), Yin
patent: 6608505 (2003-08-01), Tsuji
Arent & Fox PLLC
Tan Vibol
Via Technologies Inc.
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