I.I.L. with graded base inversely operated transistor

Details I.I.L. with graded base inversely operated transistor I.I.L. with graded base inversely operated transistor

1975-12-24

1977-12-20

Larkins, William D.

357 35, 357 36, 357 44, 357 90, H01L 2704, H01L 2972, H01L 2936

Patent

active

040645266

ABSTRACT:
An integrated injection logic semiconductor device comprises an N type semiconductor substrate, a P type semiconductor layer laminated on said semiconductor substrate, and N type first region formed in a manner penetrating through said P type semiconductor layer to reach said N type semiconductor substrate, a first P type region formed in said first N type region, a second N type regionformed in said P type semiconductor layer, and a second P type region formed between said second N type region and said N type semiconductor substrate in a manner connected directly to said N type semiconductor substrate. An integrated injection logic circuit is comprised of a lateral NPN transistor whose emitter, base and collector are constituted by said first P type region, first N type region and P type semiconductor layer, respectively, and a vertical PNP transistor whose emitter, base and collector are constituted by said N type semiconductor substrate, P type semiconductor layer plus second P type region, and second N type region, respectively.

REFERENCES:
patent: 3823353 (1974-07-01), Berger et al.
patent: 3922565 (1975-11-01), Berger et al.
Blatt et al., IEEE Int. Electron Devices Meeting, Technical Digest, pp. 511-514, (Dec. 1974).
Lin, Integrated Electronics, (Holden-Day, San Francisco, 1967), pp. 186-192.

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