Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Reexamination Certificate
2001-12-21
2003-08-19
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Flip-flop used for sensing
C365S203000, C365S207000, C327S051000, C327S052000, C327S055000
Reexamination Certificate
active
06608789
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to semiconductor memories, and more specifically, to sense amplifiers used in semiconductor memories.
BACKGROUND OF THE INVENTION
Sense amplifiers are used in conjunction with memories such as, for example, a static random access memory array (SRAM), a dynamic random access memory (DRAM) or a read only memory (ROM). Sense amplifiers function to detect when bit lines in a memory array exhibit a voltage transition in response to column and row decoding and a sense enable signal. In such memories, there is a need to amplify and decode signals provided via columns of memory cells.
It is desirable to sense a data signal with an amplifier containing a cross-coupled differential pair of transistors. The timing of turn-on of the sense amplifier is critical. One measure of a sense amplifier's quality is the minimum differential signal that the sense amplifier is able to accurately sense. An objective in sense amplifier design is to provide the maximum differential signal to the difference in gate-to-source drive (delta V
GS
) of the differential cross-coupled pair. Another critical design parameter associated with sense amplifiers is associated with the operation of a differential cross-coupled pair of transistors. The design parameter involves insuring that the difference in gate-to-source drives is greater than zero at the time the pair is clocked. If not, the output signal may not be accurate. In general, prior sense amplifiers have involved a trade-off between speed, size and power consumption.
One transistor implementation of memories is the use of silicon on insulator (SOI) processing in which a transistor is formed on an insulating material. A characteristic of a transistor formed with an SOI process is an isolated portion of the device that exists between the current conducting electrodes and below a control electrode. This portion of the transistor is commonly referred to as the “body” of the transistor and is the portion where current conduction occurs between the current conducting electrodes. The body is otherwise electrically isolated and is frequently not electrically contacted. However, simply allowing non-contacted bodies to electrically float makes the voltage associated with the body to be vulnerable to noise, leakage currents and other process variations. Voltage variations of the body cause numerous detrimental characteristics for a memory sense amplifier. For example, the body voltage variation affects the transistor threshold voltage. The amount of voltage variation is dependent upon the previous switching history of the transistor and is therefore data dependent. The reason this matters is that any offset in the sense amplifier is effectively subtracted from the bit line signal to be detected by the sense amplifier. In other words, the signal to noise ratio is reduced. For memory sense amplifiers where small differential voltages are being sensed and accurate threshold voltages are important, the body voltage variation is very problematic. One technique that has been used to minimize such disadvantages is to connect the bodies of transistors used in memory sense amplifiers to a ground potential. However, the resistance of the body contacts is large and the body often does not have time to be equalized to ground potential when very short memory cycle times are used. Because there is a relatively large voltage potential difference between the bodies of the differential pair in a sense amplifier, the voltages are not equalized at high frequencies.
Another known technique that has been used to minimize such disadvantages is to connect the bodies of a differential pair of sensing transistors in a sense amplifier together. However, when the bodies are connected together, a voltage gradient builds up in the bodies due to the lack of the ability to create a low resistance connection. Also, due to the resistance and capacitive coupling effects of the body, a relatively large time constant exists when trying to equalize the voltages of the bodies.
Yet another known technique that has been used to minimize such disadvantages is to connect the body to the source of each transistor of a differential pair of sensing transistors in a sense amplifier. The resistance of the body contacts is large and the body often does not have time to be equalized to the source when very short memory cycle times are used. Therefore, there is no ability for the electrical connection to fully discharge the body of either transistor of the differential pair of sensing transistors to ground.
REFERENCES:
patent: 5646900 (1997-07-01), Tsukude et al.
patent: 6154091 (2000-11-01), Pennings et al.
patent: 6222394 (2001-04-01), Allen et al.
patent: 6261879 (2001-07-01), Houston et al.
patent: 6433589 (2002-08-01), Lee
patent: 6466499 (2002-10-01), Blodgett
Jente B. Kuang et al., “Dynamic Body Charge Modulation for Sense Amplifiers in Partially Depleted SOI Technology”, IEEE Journal of Solid-State Circuits, vol. 36,No. 4, Apr. 2001, pp. 597-603.
Hoekstra George P.
Pelley Perry H.
Sullivan Steven C.
Chiu Joanna G.
Elms Richard
King Robert L.
Le Toan
Motorola Inc.
LandOfFree
Hysteresis reduced sense amplifier and method of operation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Hysteresis reduced sense amplifier and method of operation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hysteresis reduced sense amplifier and method of operation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3106849