Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2003-10-14
2009-06-16
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S026000, C714S043000, C714S044000
Reexamination Certificate
active
07549091
ABSTRACT:
In accordance with the present invention a system for detecting transaction errors in a system comprising a plurality of data processing devices using a common system interconnect bus, comprises a node controller operably connected to said system interconnect bus and a plurality of interface agents communicatively coupled to said node controller. Error corresponding to transactions between said interface agents and other processing modules in said system are directed to said node controller; and wherein transaction errors that would not normally be communicated to said system interconnect bus are communicated by said node controller to said system interconnect bus to be available for detection. In an embodiment of the present invention, the interface agents operate in accordance with the hypertransport protocol. A system control and debug unit and a trace cache operably connected to the system bus can be used to diagnose and store errors conditions.
REFERENCES:
patent: 5428766 (1995-06-01), Seaman
patent: 6915446 (2005-07-01), Riley
patent: 7069479 (2006-06-01), Hester et al.
patent: 7103808 (2006-09-01), Kitamorn et al.
patent: 2005/0080580 (2005-04-01), Kantake
Moll Laurent
Rowlands Joseph B.
Beausoliel Robert
Broadcom Corporation
Garlick & Harrison & Markison
Manoskey Joseph D
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