Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2006-06-05
2010-11-02
Chace, Christian P (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
Reexamination Certificate
active
07827381
ABSTRACT:
A computer system may employ a first memory virtualization and corresponding virtual-to-physical address translation technique for a first application executing on a processor and a second memory virtualization and corresponding virtual-to-physical address translation technique for a second application executing on the same processor transparent to the first application. Different virtualization and corresponding translation techniques may be employed on a per-thread basis, rather than a per-application basis. Different virtualization and corresponding translation techniques may be employed for accesses to different ranges of virtual or corresponding physical addresses. Different virtualization and corresponding translation techniques may employ different page sizes. A first or second virtualization and corresponding translation technique may include page-based, segment-based, or function-based virtual-to-physical address translation. The selection of a first or second memory virtualization and corresponding address translation technique may be dependent on a predicted workload and/or on a user policy.
REFERENCES:
patent: 4992936 (1991-02-01), Katada et al.
patent: 6112285 (2000-08-01), Ganapathy et al.
patent: 6760909 (2004-07-01), Draves et al.
patent: 6804755 (2004-10-01), Selkirk
patent: 6898677 (2005-05-01), Arimilli
patent: 6983355 (2006-01-01), Ripberger
patent: 7111145 (2006-09-01), Chen et al.
patent: 7493607 (2009-02-01), Moritz
patent: 2003/0088752 (2003-05-01), Harman
patent: 2004/0117585 (2004-06-01), Glider
patent: 2005/0055510 (2005-03-01), Hass et al.
patent: 2005/0076156 (2005-04-01), Lowell
patent: 2006/0048114 (2006-03-01), Schmidt
patent: 2007/0005870 (2007-01-01), Neiger
Dictionary.com http://dictionary.reference.com/browse/table Accessed Nov. 2, 2009.
wodrnet.princeton.edu http://wordnetweb.princeton.edu/perl/webwn?s=table Accessed Nov. 2, 2009.
U.S. Appl. No. 11/446,645, filed Jun. 5, 2006.
U.S. Appl. No. 11/447,189, filed Jun. 5, 2006.
U.S. Appl. No. 11/446,620, filed Jun. 5, 2006.
Freeman Jay R.
Gustafson Phyllis E.
Manczak Olaf
Paleczny Michael H.
Vick Christopher A.
Chace Christian P
Davidson Chad L
Kowert Robert C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Oracle America Inc.
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