Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1998-12-18
2000-11-07
Pihulic, Daniel T.
Static information storage and retrieval
Read/write circuit
Bad bit
371 4013, 371 373, G11C 700
Patent
active
H00019151
ABSTRACT:
A hybrid memory provides both protected and unprotected storage arrays within a common device. The memory includes shared resources including address decoding, data input and output paths and power supply. Three memory arrays provide the storage capacity in which a first memory serves as unprotected memory and a second and third provide storage for data and error correction codes, respectively.
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patent: 4965828 (1990-10-01), Ergott, Jr. et al.
patent: 5056095 (1991-10-01), Horiguchi et al.
patent: 5566194 (1996-10-01), Wells et al.
patent: 5671388 (1997-09-01), Hasbun
Boone John V.
Ukura John R.
Cardiac Pacemakers Inc.
Pihulic Daniel T.
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