Static information storage and retrieval – Read/write circuit – Particular read circuit
Reexamination Certificate
2007-10-30
2010-02-23
Tran, Andrew Q (Department: 2824)
Static information storage and retrieval
Read/write circuit
Particular read circuit
C365S189120, C365S189080, C365S203000, C365S196000
Reexamination Certificate
active
07668024
ABSTRACT:
A hybrid circuit for a memory includes: a skewed static logic gate circuit; a dynamic pre-discharge device coupled with the skewed static logic gate circuit for operating the static logic gate circuit as a dynamic circuit.
REFERENCES:
patent: 7136296 (2006-11-01), Luk et al.
patent: 7242629 (2007-07-01), Luk et al.
patent: 0727932 (1996-08-01), None
J. Davis, D. Plass, P. Bunce, Y. Chan, A. Pelella, R. Joshi, A. Chen, W. Huott, T. Knips, P. Patel, K. Lo, E. Fluhr, “A 5.6GHz 64kB Dual-Read Data Cache for the Power6TM Processor,” 2006 IEEE International Solid-State Circuits Conference, 1-4244-0079-Jan. 2006 © 2006 IEEE.
J. Dorsey, S. Searles, M. Ciraula, S. Johnson, N. Bujanos, D. Wu, M. Braganza, S. Meyers, E. Fang, R. Kumar, “An Integrated Quad-Core Opteron™ Processor,” 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007 / Feb. 12, 2007.
Ram K. Krishnamurthy, Atila Alvandpour, Galesh Balaramurugan, Naresh R. Shanbhag, K. Soumyanath, and Shekhar Y. Borkar, A 130-nm 6-GHz 256 32 bit Leakage-Tolerant Register File, IEEE Journal of Solid-State Circuits, vol. 37, No. 5, May 2002.
J. Pille, C. Adams, T. Christensen, S. Cottier, S. Ehrenreich, F. Kono, D. Nelson, O. Takahashi, S. Tokito, O. Torreiter, O. Wagner, and D. Wendel, “Implementation of the Cell Broadband EngineTM in a 65nm SOI Technology Featuring Dual-Supply SRAM Arrays Supporting 6GHz at 1.3V,” ISSCC 2007 / Session 18 / SRAM / 18.1.
Chang Leland
Montoye Robert K.
Nakamura Yutaka
Alexanian Vazken
Buchenhorner Michael J.
International Business Machines - Corporation
Tran Andrew Q
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