Hybrid state machine

Details Hybrid state machine Hybrid state machine

2005-05-10

2005-05-10

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06892362

ABSTRACT:
One aspect of the invention provides an apparatus for implementing a state machine. The apparatus comprises a software component and a hardware component each arranged to implement at least one state and to be responsive to at least one input event to perform one or more functions. The apparatus thus implements a hybrid state machine offering the fast performance of a hardware implementation where required, while offering the flexibility and reduced testing times of a software implementation in respect of any aspect of the state machine not implemented in hardware. The apparatus is particularly suited for use in telecommunications systems and, in one embodiment, is arranged to perform pointer interpretation in accordance with ITU-T standard G.783.

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Borshchev et al.“Java Engin for UML Based Hybrid State Machines”, Dec. 2000, IEEE Simulation Conference Proceedings, Winter, vol. 2, pp. 1888-1894.

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