Hybrid porous low-K dielectrics for integrated circuits

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S759000, C438S761000, C438S763000, C438S781000, C438S789000, C438S790000, C427S243000

Reexamination Certificate

active

06514881

ABSTRACT:

FIELD OF THE INVENTION
The invention is generally related to the field of pre- and inter-metal dielectric films used in integrated circuits and more specifically to porous low-k dielectric films.
BACKGROUND OF THE INVENTION
As integrated circuits become more and more dense, the RC delay factor associated with the interconnect layers becomes more critical. One method for improving the RC delay factor is to reduce the capacitance between metal lines. (This include both metal lines in the same metal interconnect layer and metal lines in adjacent metal interconnect layers.) For this reason, a great deal of work has been done on developing new low dielectric constant (low-K) materials for use in pre-metal, inter-metal, and intra-metal dielectrics.
One class of materials being investigated is spin-on dielectrics. Spin-on dielectrics include such materials as hydrogen silsesquioxane (HSQ) and fluorinated silicon dioxide (FSG). Unfortunately, many spin-on dielectrics involve the use of solvents that may leave a residual contamination and pose environmental waste issues.
Another class of materials being investigated is called porous dielectrics. Porous dielectrics typically have a stiff inorganic structure with air holes to reduce the overall dielectric constant. Unfortunately, to date, these films have been friable and lack the mechanical toughness to survive the subsequent chemical mechanical planarization process now being used in many interconnect fabrication sequences.
SUMMARY OF THE INVENTION
The invention is a method for forming a porous dielectric film using a halide and an organic modifier. An organically modified dielectric network structure and solid halide-containing material is co-deposited using a chemical vapor deposition process. The solid halide-containing material is then sublimated leaving a porous dielectric.
An advantage of the invention is providing a porous low-k film that is easily fabricated and has the mechanical toughness to withstand subsequent processing.
This and other advantages will be apparent to those of ordinary skill in the art having reference to the specification in conjunction with the drawings.


REFERENCES:
patent: 6171945 (2001-01-01), Mandal et al.
patent: 6194029 (2001-02-01), Aoi
patent: 6214748 (2001-04-01), Kobayashi et al.
Wolf et al., Silicon processing for the VLSI Era, vol. 1, Lattice Press pp. 184-185.*
Coffman, “Synthesis, Processing, and Characterization of Several Group IV, V and VI Nitrides and Related Compounds,” Arizona State University , Dec. 1996.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Hybrid porous low-K dielectrics for integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Hybrid porous low-K dielectrics for integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hybrid porous low-K dielectrics for integrated circuits will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3179297

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.