Hybrid-orientation technology buried n-well design

Details Hybrid-orientation technology buried n-well design Hybrid-orientation technology buried n-well design

2007-07-31

2007-07-31

Wojciechowicz, Edward (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S351000, C257S353000, C257S401000, C257S532000

Reexamination Certificate

active

11161861

ABSTRACT:
A semiconductor structure is provided that includes a hybrid orientated substrate having at least two coplanar surfaces of different surface crystal orientations, wherein one of the coplanar surfaces has bulk-like semiconductor properties and the other coplanar surface has semiconductor-on-insulator (SOI) properties. In accordance with the present invention, the substrate includes a new well design that provides a large capacitance from a retrograde well region of the second conductivity type to the substrate thereby providing noise decoupling with a low number of well contacts. The present invention also provides a method of fabricating such a semiconductor structure.

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Yang, et al., “High Performance CMOS Fabricated on Hybrid Substrate With Different Crystal Orientations”, IEEE IEDM 2003, pp. 18.7.1-18.7.4.
U.S. Appl. No. 10/902,557, filed Jul. 29, 2004 to Chan, et al.

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