Hybrid mapping implementation within a non-volatile memory...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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C711S005000

Reexamination Certificate

active

10676652

ABSTRACT:
Methods and apparatus for allow different mapping implementations, including a many-to-one logical to physical block mapping, to be used within a memory system are disclosed. According to one aspect of the present invention, a method for mapping a plurality of logical blocks to a physical block includes identifying a first logical block meets at least one criterion. The method also includes identifying a second logical block which is substantially complementary to the first logical block, and providing contents associated with the first logical block and contents associated with the second logical block to the physical block.

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