Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
1999-04-30
2001-07-10
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S676000
Reexamination Certificate
active
06259152
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a packaging technology for a semiconductor chip and, more particularly, to a hybrid leadframe assembled with a semiconductor chip.
DESCRIPTION OF THE RELATED ART
Various leadframes have been proposed for semiconductor chips. A kind of leadframes has a structure called as “Leadframe-Over-Chip” configuration.
FIG. 1
illustrates a semiconductor chip
1
assembled with a leadframe
2
. The leadframe
2
has the leadframe-over-chip configuration.
The leadframe
2
comprises plural conductive leads
2
a
arranged on both sides of the semiconductor chip
1
. The conductive leads
2
a
extend over an upper surface of the semiconductor chip
1
, and inner end portions
2
b
of the conductive leads
2
a
are bent so as to be parallel to end lines
1
a
of the semiconductor chip
1
. The inner end portions
2
b
are called as “stitch”, and are arranged at intervals over both side areas of the upper surface of the semiconductor chip
1
. Bonding pads
1
b
are formed in a central area of the upper surface of the semiconductor chip
1
along side lines
1
c
, and are connected to an integrated circuit (not shown) inside the semiconductor chip
1
.
The semiconductor chip
1
is bonded to the prior art leadframe
2
by means of a pair of bonding tapes
3
a
/
3
b
. Each bonding tape
3
a
/
3
b
has insulating adhesive compound layers on both surface thereof, and the lower insulating adhesive compound layers are respectively bonded to the side areas of the upper surface of the semiconductor chip
1
. The inner end portions
2
b
are bonded to the upper insulating adhesive compound layers, and the bonding pads
1
b
are exposed to the gap between the bonding tapes
3
a
and
3
b
. Bonding wires
4
of gold are connected between the inner end portions
2
b
and the bonding pads
1
b
, and the conductive leads
2
a
are electrically connected through the bonding wires
4
and the bonding pads
1
b
to the integrated circuit.
Thus, the leadframe-over-chip configuration is featured by the inner end portions
2
b
over the semiconductor chip
1
. The manufacturer increases the bonding pads
1
b
for providing a large number of signal paths to the integrated circuit, and the upper surface of the semiconductor chip
1
becomes too narrow to arrange the inner end portions
2
b
over the upper surface. When the manufacturer integrates electric circuits on a small semiconductor chip
1
, the upper surface may be too narrow to arrange all the inner end portions
2
b
thereover. In this situation, Russell proposes another prior art leadframe in U.S. Pat. No. 5,545,920.
FIG. 2
illustrates the prior art leadframe disclosed in the U.S. Patent. Conductive leads
5
are arranged around a semiconductor chip
6
. The conductive leads
5
are broken down into three categories. The conductive leads in the first category are labeled with reference
5
a
, and distribute electric power to an integrated circuit inside the semiconductor chip
6
. For this reason, plural bonding pads
6
a
are connected to the conductive leads
5
a
through bonding wires
7
. The conductive leads
5
a
are bonded to the semiconductor chip
6
by means of insulating adhesive compound (not shown).
The conductive leads in the second category are labeled with reference
5
b
. The conductive leads
5
b
have inner end portions located over the semiconductor chip
6
, and are bonded to the semiconductor chip
6
by means of the insulating adhesive compound (not shown). Electric signals are propagated through the conductive leads
5
b
between the integrated circuit and an conductive pattern on a circuit board (not shown), and, for this reason, the conductive leads
5
b
are connected through the bonding wires
7
to the bonding pads
6
a
, respectively.
The conductive leads in the third category are labeled with reference
5
c
, and electric signals are also propagated through the conductive leads
5
c
between the conductive pattern on the circuit board and the integrated circuit. The conductive leads
5
c
are also connected through the bonding wires
7
to the bonding pads
6
a
, respectively. However, the inner end portions of the conductive leads
5
c
are outside the semiconductor chip
6
, and are not bonded to the semiconductor chip
6
. Thus, Russell arranges the conductive leads
5
c
outside the semiconductor chip
6
so as to increase the conductive leads
5
. The prior art leadframe proposed by Russell is called as “hybrid leadframe-over-chip configuration”.
The first problem inherent in the prior art hybrid leadframe-over-chip configuration is deformation of the conductive leads
5
c
during a transfer to the assembling apparatus and the assembling work. Although the conductive leads
5
b
are bonded to the adhesive compound layers of the bonding tapes, the conductive leads
5
c
are separated from one another, and are liable to be deformed, i.e., bent or twisted. If the manufacturer uses the prior art hybrid leadframe-over-chip for a small semiconductor chip
6
, the manufacturer prolongs the conductive leads
5
c
, and the prolonged conductive leads
5
c
are much liable to be deformed.
The second problem is incomplete bonding to the bonding pads
6
a
. The conductive leads
5
c
are separated from one another, and the inner end portions are not always on a level with the conductive leads
5
b
. The bonding machine is usually regulated to the inner end portions of the conductive leads
5
b
, and some bonding wires
7
are incompletely connected to the inner end portions of the conductive leads
5
c.
The third problem is incomplete packaging. Even if the bonding wires are completely bonded to the inner end portions of the conductive leads
5
c
, the conductive leads are still liable to float and sink. While the manufacturer is sealing the prior art hybrid leadframe in synthetic resin, some conductive leads
5
c
float on the melted synthetic resin, and are exposed to the outside of the plastic package. Moreover, if a solid piece of synthetic resin is left in a molding die, the solid piece may urge the conductive lead
5
c
and push out the bonding wire from the cavity. Then, the molding die is closed, and the bonding wire is cracked.
SUMMARY OF THF INVENTION
It is therefore an important object of the present invention to provide a leadframe, which is free from the problems inherent in the prior art hybrid leadframe.
It is also an important object of the present invention to provide a semiconductor device, in which the leadframe is used for a semiconductor chip.
In accordance with one aspect of the present invention, there is provided a leadframe assembled with a semiconductor chip comprising first conductive leads respectively having first inner end portions projecting into a space over an upper surface of the semiconductor chip and adhered to the upper surface by means of insulating adhesive compound, second conductive leads each having a second inner end portion outside the space and a supporting portion projecting into the space so as to be adhered to the insulating adhesive compound and bonding wires connected between bonding pads formed on the upper surface of the semiconductor chip and the first inner end portions and the second inner end portions of the second conductive leads.
In accordance with another aspect of the present invention, there is provided a semiconductor device comprising a semiconductor chip having an upper surface where bonding pads are formed, and a leadframe assembled with the semiconductor chip and including first conductive leads respectively having first inner end portions projecting into a space over an upper surface of the semiconductor chip and adhered to the upper surface by means of insulating adhesive compound, second conductive leads each having a second inner end portion outside the space and a supporting portion projecting into the space so as to be adhered to the insulating adhesive compound, and bonding wires connected between bonding pads formed on the upper surface of the semiconductor chip and the first inner end portions and the se
Fukamachi Ken
Ichinose Michihiko
Inaba Takehito
Takeda Hiromitsu
Clark Sheila V.
Hutchins, Wheeler & Dittmar
NEC Corporation
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