Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2011-07-05
2011-07-05
Menz, Laura M (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S758000, C257S762000
Reexamination Certificate
active
07973409
ABSTRACT:
The present invention provides an interconnect structure (of the single or dual damascene type) and a method of forming the same, in which a dense (i.e., non-porous) dielectric spacer is present on the sidewalls of a dielectric material. More specifically, the inventive structure includes a dielectric material having a conductive material embedded within at least one opening in the dielectric material, wherein the conductive material is laterally spaced apart from the dielectric material by a diffusion barrier, a dense dielectric spacer and, optionally, an air gap. The presence of the dense dielectric spacer results in a hybrid interconnect structure that has improved reliability and performance as compared with existing prior art interconnect structures which do not include such dense dielectric spacers. Moreover, the inventive hybrid interconnect structure provides for better process control which leads to the potential for high volume manufacturing.
REFERENCES:
patent: 5759913 (1998-06-01), Fulford et al.
patent: 5949143 (1999-09-01), Bang
patent: 6104077 (2000-08-01), Gardner et al.
patent: 6159845 (2000-12-01), Yew et al.
patent: 6208015 (2001-03-01), Bandyopadhyay et al.
patent: 6211057 (2001-04-01), Lin et al.
patent: 6217418 (2001-04-01), Lukanc et al.
patent: 6329279 (2001-12-01), Lee
patent: 6399476 (2002-06-01), Kim et al.
patent: 6423629 (2002-07-01), Ahn et al.
patent: 6440839 (2002-08-01), Partovi et al.
patent: 6445072 (2002-09-01), Subramanian et al.
patent: 6501180 (2002-12-01), Kitch
patent: 6524948 (2003-02-01), Tamaoka et al.
patent: 6635967 (2003-10-01), Chang et al.
patent: 6815329 (2004-11-01), Babich et al.
patent: 6861332 (2005-03-01), Park et al.
patent: 6867125 (2005-03-01), Kloster et al.
patent: 7033926 (2006-04-01), Schindler et al.
patent: 7071091 (2006-07-01), Clarke et al.
patent: 7256127 (2007-08-01), Gallagher et al.
patent: 7309649 (2007-12-01), Colburn et al.
patent: 7361991 (2008-04-01), Saenger et al.
patent: 7393776 (2008-07-01), Colburn et al.
patent: 7485567 (2009-02-01), Clevenger et al.
patent: 7790542 (2010-09-01), Dyer et al.
patent: 7807563 (2010-10-01), Gabric et al.
patent: 2001/0045608 (2001-11-01), Tseng et al.
patent: 2002/0158337 (2002-10-01), Babich et al.
patent: 2003/0176055 (2003-09-01), Wu
patent: 2006/0151887 (2006-07-01), Oh et al.
patent: 2006/0264027 (2006-11-01), Su et al.
patent: 2007/0001306 (2007-01-01), Su et al.
patent: 2007/0246831 (2007-10-01), Gabric et al.
patent: 2008/0174017 (2008-07-01), Yang et al.
patent: 2008/0185722 (2008-08-01), Liu et al.
patent: 2009/0072409 (2009-03-01), Nitta et al.
patent: 2009/0075470 (2009-03-01), Nitta et al.
patent: 2009/0294898 (2009-12-01), Feustel et al.
patent: 2009/0315117 (2009-12-01), Dyer et al.
patent: 2010/0133648 (2010-06-01), Seidel et al.
Hon Wong Keith Kwong
Shaw Thomas M.
Yang Chih-Chao
Yang Haining S.
International Business Machines - Corporation
Menz Laura M
Percello, Esq. Louis J.
Scully , Scott, Murphy & Presser, P.C.
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