Hybrid high-power integrated circuit

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Patent

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Details

257796, 361761, H05K 720

Patent

active

061152552

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

The present invention relates in general to electronic engineering and more specifically to a power hybrid integrated circuit.


BACKGROUND OF THE INVENTION

One prior-art power hybrid integrated circuit is known (U.S. Pat. No. 4,737,235), comprising dielectric board having a topological metallization pattern and a number of recesses, wherein semiconductor chips are fixed by means of a binder so that the surfaces of the chips having bonding pads are coplanar with the board surface, and the chip bonding pads are electrically connected to the topological metallization pattern.
The circuit construction mentioned above has a small area of chip-to-board heat transfer and hence an inadequate heat dissipating capacity.
One more prior-art hybrid integrated circuit is known (EP, A, 0334397), comprising a double-side metallized dielectric board with a topological metallization pattern on the face side and with at least one mounting pad located in a recess of the face board side on a heat sink which is essentially a system of holes in the recess bottom, the holes being filled with a heat conducting material. The board is joined with its back side to a heat conducting base, the naked electronic chip is placed on and fixed to the recess in the mounting pad so that the chip face surface is coplanar with the topological metallization pattern.
This circuit construction cannot make use of a broad range of semiconductor devices.


SUMMARY OF THE INVENTION

The principal object of the present invention is to provide a power hybrid integrated circuit having such a constructive arrangement of the heat sink that allows to improve conditions of the heat dissipation from the chip.
The foregoing object is accomplished due to the fact that in a power microwave hybrid integrated circuit, comprising a double-side metallized dielectric board with a topological metallization pattern on the face side thereof and with at least one mounting pad located in a recess of the board face side on a heat sink which is essentially a system of holes in the recess bottom, filled with a heat conducting material, the board is joined with its back side to a heat conducting base, the naked electronic chip is placed on and fixed to the recess in the mounting pad so that the chip face surface is coplanar with the topological metallization pattern, according to the invention, the heat sink holes in the bottom of the recess are blind, remained thickness of the bottom of said blind holes is from 1 to 999 .mu.m, and spaces between the chip and the side walls of the recess are filled at least partially with the heat conducting material.
Arranging the heat conducting elements in the system of blind holes of the board made in the mounting pad and filled with a heat conducting binder makes it possible to extend simultaneously the field of application of the proposed circuit due to a possibility of providing such circuits that can incorporate a common-emitter or common-base bipolar junction transistor and of using the gap between the recess metallization and the shield metallization as a capacitor built into the board due to electrical insulation of the chip with remaining the heat dissipation therefrom.
At least partial filling of the spaces between the chip and the side walls of the recess with a heat conducting binder increases the heat-transfer area, thereby improving the heat dissipation from the chip.
The lower limit of the remained thickness of the blind hole bottom is dictated by the necessity to provide an electric insulation of the chip from the shield grounding metallization, while the upper limit thereof is dictated by a minimum attainable effect of increasing the heat-transfer area and hence of improving heat transfer conditions.
Providing opposing blind holes made on the back side of the board between the blind holes in the bottom of the recess and filled with a heat conducting material increases the heat-transfer area and hence increases the rate of heat dissipation from the chip. The remained dielectric thickness between the

REFERENCES:
patent: 4729061 (1988-03-01), Brown
patent: 4731701 (1988-03-01), Kuo
patent: 4737235 (1988-04-01), Scannell
patent: 5309322 (1994-05-01), Wagner
patent: 5646828 (1997-07-01), Degani
patent: 5687062 (1997-11-01), Larson
patent: 5835356 (1998-11-01), Wieloch
patent: 5866952 (1999-02-01), Wojharowski

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