Hybrid high-k gate dielectric film

Details Hybrid high-k gate dielectric film Hybrid high-k gate dielectric film

2007-06-30

2009-12-15

Estrada, Michelle (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C438S199000, C438S287000, C257SE27108, C257SE21632, C257SE29049, C257SE29052, C257SE29053

Reexamination Certificate

active

07632745

ABSTRACT:
The present invention discloses a method of forming a gate dielectric film including: providing a channel region in a transistor, the channel region including multiple segments having different sizes, some of which belong to a first surface portion while others belong to a second surface portion wherein the first surface portion and the second surface portion are adjacent; forming a hybrid high-k gate dielectric film over the channel region including: forming a first dielectric material over the first surface portion, the first dielectric material having a sub-monolayer thickness; forming a second dielectric material over the second surface portion, the second dielectric material having a sub-monolayer thickness, and forming a third dielectric film over the first dielectric film and the second dielectric film wherein the third dielectric film is high-k.

REFERENCES:
patent: 6867101 (2005-03-01), Yu
patent: 2003/0194853 (2003-10-01), Jeon
patent: 2005/0272206 (2005-12-01), Forbes
patent: 2006/0019454 (2006-01-01), Mears et al.
patent: 2006/0134870 (2006-06-01), Luan et al.
patent: 2006/0189154 (2006-08-01), Ahn et al.
patent: 2006/0237803 (2006-10-01), Zhu et al.
patent: 2006/0273411 (2006-12-01), Triyoso et al.

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