Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2004-09-30
2010-12-21
Patel, Hetul (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S147000, C711SE12094, C710S200000
Reexamination Certificate
active
07856537
ABSTRACT:
Embodiments of the invention relate a hybrid hardware and software implementation of transactional memory accesses in a computer system. A processor including a transactional cache and a regular cache is utilized in a computer system that includes a policy manager to select one of a first mode (a hardware mode) or a second mode (a software mode) to implement transactional memory accesses. In the hardware mode the transactional cache is utilized to perform read and write memory operations and in the software mode the regular cache is utilized to perform read and write memory operations.
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Hughes Christopher J.
Kumar Sanjeev
Kundu Partha
Nguyen Anthony
Blakely , Sokoloff, Taylor & Zafman LLP
Dudek, Jr. Edward J
Intel Corporation
Patel Hetul
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