Hybrid bump capacitor

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S306000, C257S738000

Reexamination Certificate

active

07825522

ABSTRACT:
A device fabricated on a chip is disclosed. The device generally includes (A) a first pattern and a second pattern both created in an intermediate conductive layer of the chip, (B) at least one via created in an insulating layer above the intermediate conductive layer and (C) a first bump created in a top conductive layer above the insulating layer. The first pattern generally establishes a first of a plurality of plates of a first capacitor. The via may be aligned with the second pattern. The first bump may (i) be located directly above the first plate, (ii) establish a second of the plates of the first capacitor, (iii) be suitable for flip-chip bonding and (iv) connect to the second pattern through the via such that both of the plates of the first capacitor are accessible in the intermediate conductive layer.

REFERENCES:
patent: 2006/0203421 (2006-09-01), Morris et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Hybrid bump capacitor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Hybrid bump capacitor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hybrid bump capacitor will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4238240

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.