Hybrid bipolar/field-effect power transistor in group III-V mate

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257192, 257197, 257 20, 257 24, H01L 2707, H01L 29205

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active

053592204

ABSTRACT:
A hybrid power transistor (40) includes a vertical PNP bipolar transistor (42) having a floating base (46). A junction-gate type field-effect transistor (FET) (62) has a lateral N-type channel (64,66) and a vertical electron injection path (54) from the channel (64,66) into the base (46) of the bipolar transistor (42). The FET channel current and thereby the electron injection current are controlled by the FET gate voltage. The injection current conductivity modulates the base (46) and thereby controls the collector current of the bipolar transistor (42). The FET (62) may have a high electron mobility transistor (HEMT), junction-gate field-effect transistor (JFET) or metal-semiconductor field-effect transistor (MESFET) structure. The FET (62) does not require a gate insulating layer, enabling fabrication of the hybrid transistor (40) in the group III-V material system.

REFERENCES:
patent: 4320410 (1982-03-01), Nishizawa et al.
patent: 4495513 (1985-01-01), Descamps
patent: 5068705 (1991-11-01), Tran
"Power Transistors: Device Design and Application", edited by B. Jayant Baliga et al, IEEE Press 1984, pp. 354-363.
"Ultra-High-Speed Modulation-Doped Field-Effect Transistors: A Tutorial Review", L. D. Nguyen et al., Proceedings of the IEEE, vol. 80, No. 4, Apr. 1992, pp. 494-518.

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