Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-06-28
2004-09-21
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S347000, C257S335000, C257S409000, C257S647000
Reexamination Certificate
active
06794719
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of semiconductor devices, and more particularly to silicon-on-insulator lateral drift metal oxide semiconductor (SOI-LDMOS) devices suitable for high-voltage applications.
BACKGROUND OF THE INVENTION
The present invention relates generally to, and has features in common with, an invention disclosed in U.S. patent application Ser. No. 09/794,562, filed Feb. 27, 2001 by the same applicants (the “'562 Application”), which prior-filed application is incorporated herein by reference as if fully set forth. The '562 Application dealt generally with SOI LDMOS devices exemplary of the devices discussed herein.
In known MOSFET devices, a conductive path is established between two regions of the same conductivity type, i.e. the source and drain, through a body region of the opposite conductivity type. The current flows in such channel region, or in LDMOS devices, through such body region and a “lateral drift” region, in response to an applied gate voltage which creates an inversion channel in the body region, and a drain to source voltage which regulates the current which flows therein. In normal MOSFET operation, both the drain and the source regions are reverse biased vis-à-vis the body region. Due to this reverse biasing, no current flows between the drain and source except in the channel region. Thus, current can only flow from drain to source, and electrons thus flow from source to drain, as controlled by the voltage on the gate and the drain to source voltage.
If during device operation the reverse bias between the source and body regions changes to forward bias, a significant current can develop where the source region injects electrons into the body region and back to the drain region. Since this current is not directly controlled by the gate voltage or any other mechanism, it is in effect a runaway current, and can destroy the device. Such breakdown is generally referred to as “bipolar second breakdown.”
For example, in a lighting application, a typical drain to source voltage is 400 V; if a surge in such drain to source voltage reaches 500 V or more, the semiconductor device may breakdown due to such bipolar turn-on, when a significant current develops between the source and drain regions, and ultimately the device will be destroyed.
Therefore, it is an object of the present invention to provide an improved semiconductor device in which it is possible to control and contain any electrical breakdown such as to obviate destruction of the device.
It is a further object of the present invention to provide an improved semiconductor device which is highly resistant to bipolar second breakdown.
These and other objects will become more apparent from the description of the invention to follow.
SUMMARY OF THE INVENTION
The present invention achieves the foregoing objects by providing a hybrid semiconductor device in which one or more diode regions are integrated into a transistor region. In a preferred embodiment the transistor region is a continuous (self-terminating) device in which are integrated one or more diode portions. Within the diode portions, since there is only one PN junction, the mechanism for breakdown failure due to bipolar turn-on is nonexistent. The diode regions are formed such that they have a lower breakdown voltage than the transistor region, and thus any transient voltage (or current) induced breakdown is necessarily contained in the diode regions. In a preferred embodiment, the breakdown voltage of the diode portions is lowered by narrowing their field plate length relative to the transistor portion of the device. This allows the device to survive any such breakdown without being destroyed, resulting in a more rugged and more reliable SOI LDMOS device.
REFERENCES:
patent: 4058822 (1977-11-01), Awane et al.
patent: 4270137 (1981-05-01), Coe
patent: 4290078 (1981-09-01), Romen
patent: 4725915 (1988-02-01), Jwahashi et al.
patent: 4766474 (1988-08-01), Nakagawa et al.
patent: 4928157 (1990-05-01), Matsunaga et al.
patent: 5468984 (1995-11-01), Efland et al.
patent: 5612564 (1997-03-01), Fujishima et al.
patent: 5614752 (1997-03-01), Takenaka
patent: 5767550 (1998-06-01), Calafut et al.
patent: 5812006 (1998-09-01), Teggatz et al.
patent: 5834823 (1998-11-01), Honda
patent: 5907181 (1999-05-01), Han et al.
patent: 5912495 (1999-06-01), Depetro et al.
patent: 5969387 (1999-10-01), Letavic et al.
patent: 5990516 (1999-11-01), Momose et al.
patent: 6133591 (2000-10-01), Letavic et al.
patent: 6160290 (2000-12-01), Pendharkar et al.
patent: 6348716 (2002-02-01), Yun
patent: 6365932 (2002-04-01), Kouno et al.
patent: 6384453 (2002-05-01), Yanagigawa
patent: 6414831 (2002-07-01), Orchard-Webb
patent: 2002/0167088 (2002-11-01), Hoshino et al.
patent: 3122352 (1983-01-01), None
patent: 2754406 (1998-04-01), None
patent: 2754406 (1998-04-01), None
patent: 51-147972 (1976-12-01), None
patent: 2000-114266 (2000-04-01), None
patent: 2000-260883 (2000-09-01), None
“Impact Ionization in Saturated in Saturated High-Voltage LDD Lateral DMOS Fets”, by Michael E. Cornell et al., XP-002253260, pp. 164-167.
US 010045, U.S. Ser. No. 09/794,562.
Letavic Theodore James
Petruzzello John
Simpson Mark
Flynn Nathan J.
Koninklijke Philips Electronics , N.V.
Sefer Ahmed N.
Waxler Aaron
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