Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-02-12
2002-01-29
Abraham, Fetsum (Department: 2876)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S309000, C257S317000, C257S398000, C257S255000, C257S665000, C257S908000
Reexamination Certificate
active
06342714
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to an HSG lower electrode structure employed in the capacitor part of a storage device such as a DRAM, SRAM and the like, and a capacitor having the lower electrode as well as a formation method of the capacitor.
2. Description of the Related Art
In recent years, hemispherical grained (HSG) silicon is being used as the lower electrode of the capacitor of a DRAM. The use of HSG silicon has an advantage of facilitating the expansion of the surface area of the electrode by a smaller number of manhours. Since, however, no impurity is included in HSG silicon immediately after its formation, it is necessary to introduce an impurity into it afterward in one way or another in order to make it function as an electrode.
Ion implantation was tried in the early stage of the development, but it soon became clear that an expected increase in the surface area cannot be attained due to collapse of the shape of the hemispherical grains (HSGs) as a result of sputtering accompanying the implantation of the ions.
Later on, a method of forming HSGs on impurity doped amorphous silicon was established, and a method of introducing an impurity into the body of the HSGs by thermal diffusion through the underlying layer of the HSGs has been employed.
In a paper entitled “Hemispherical Grained Silicon Formation on in-situ Phosphorus Doped Amorphous-Si Using the Seeding Method,” Solid State Devices and Materials, 1992, p. 422, it was disclosed that grains controlled in size and density can be formed on phosphorus doped amorphous silicon. By subsequent diffusion of phosphorus into the grains by means of thermal diffusion, it becomes possible to make the grains function as an electrode.
However, the region of diffusion layer has to be made fine and the thermal history has to be reduced along with micro refining of the devices, and as a result, a satisfactory thermal diffusion of the impurity is now becoming difficult. As a result of the insufficient introduction of the impurity into HSG body, a problem is being surfaced that the capacitance of the capacitor is not increased as expected because of the depletion in the electrode. In particular, when the expansion of the surface area is attempted by forming the grain in spherical shape, the diameter of the grain on the side of the surface of its contact with the underlying layer is reduced, giving rise to the so-called “neck.” Diffusion of the impurity through such a narrow “neck” is made the more difficult.
Besides, in an HSG having such a narrow “neck,” the HSG is liable to be fractured in the process of cleaning or the like, and the fragments of the fracture cause short-circuit between the electrodes, leading to the reduction in the yield.
In the past, in order to prevent the occurrence of depletion and fracture of the HSG, the HSG was formed in a hemispherical shape having no constricted part, that is, in a manner where the effective surface area was sacrificed.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method of forming a capacitor which enables the prevention of the occurrence of depletion and fracture of the HSGs without resorting to the sacrifice, as was the case in the conventional method, of the effective surface area.
It is another object of the present invention to provide a structure of an HSG lower electrode and the constitution of a capacitor by means of the above-mentioned formation method.
The present invention for resolving the problems is, in a method of formation of a capacitor composed of a polysilicon lower electrode, a dielectric film, and an upper electrode, the method of formation of a capacitor comprising at least a step of forming on a silicon layer, HSG silicon bodies having necks of small diameter on the side of the contact surface with the silicon layer, a step of forming a lower electrode by depositing a silicon film keeping the ruggedness of the formed HSGs so as to cover the HSGs by filling the gaps between the silicon layer around the necks and the HSGs, a step of forming a dielectric film, and a step of forming an upper electrode.
Further, the present invention is a capacitor provided with an HSG lower electrode having a silicon layer and spherical silicon grains formed on the silicon layer, wherein the silicon grain has a neck with a small diameter (first diameter) on the side of contact surface with the silicon layer, and a silicon film formed so as to cover the silicon grain by filling the gap between the silicon layer around the periphery of the neck and the grain while retaining the rugged shape of the silicon grain, a lower electrode structure formed in such a way that the diameter (second diameter) of the neck covered with the silicon film is smaller than the maximum diameter of the silicon grain formed by being covered with the silicon film, a dielectric film formed on the lower electrode, and a conductive film formed on the dielectric film.
REFERENCES:
patent: 5796484 (1998-08-01), Honma et al.
patent: 5930625 (1999-07-01), Lin et al.
patent: 5989969 (1999-11-01), Watanabe et al.
patent: 6013555 (2000-01-01), Yew et al.
patent: 6037220 (2000-03-01), Chien et al.
patent: 6066529 (2000-05-01), Lin et al.
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H. Watanabe et al., “Tsukuba”,Hemispherical Grained Silicon(HSG-Si)Formation on In-Situ Phosphorous Doped Amorphous-Si Using the Seeding Method, pp. 422-424, (1992).
Hirota Toshiyuki
Honma Ichiro
Abraham Fetsum
Foley & Lardner
NEC Corporation
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