Hot swap circuit module

Details Hot swap circuit module Hot swap circuit module

2002-04-24

2004-10-05

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus expansion or extension

C710S302000

Reexamination Certificate

active

06801973

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a hot swap circuit module, and particularly to a hot swap circuit module for a switch.
2. Description of the Related Art
Hot swapping is a useful functions for inserting a hard disk drive, an interface card into a system, and removing a device from the system when the system is hot. Hot swapping saves time for shutdown and rebooting. It is very useful in managing and maintaining a network system. There are many logic circuits and interface cards electrically connected together in a typical network system. Were it not for hot swapping, it would take much time to save the status data of the network system to shut down the network system. Similarly, it also takes much time to assert the initial value of the network system. For example, when a switch is shut down to replace a switch module, the network is disconnected for a long time and the transmission efficiency of the network is reduced. Thus, hot swap design is very important in a switch.
In order to reduce the impact of a hot swap, the prior art usually requires additional circuits.
FIG. 1
a
illustrates the disturbance of the bus signal caused by a hot swap.
FIG. 1
b
illustrates a structure of a hot swap bus. A bus
60
is connected to a device
61
through a signal line
63
, to a device
62
through a signal line
64
, and a device
65
is going to connect to the bus
60
. The device
61
,
62
, and
65
all comprise a driving signal line DRV and receiving signal lines RCV and, there-upon uncharged capacitance loads CLx, Cly, and CLz to ground. When the device
65
is inserted into the connector connected to the bus
60
, the bus
60
is instantaneously shorted to ground by a capacitance load CLx , and a disturbance signal
53
, which is relative to a quiesced signal level
51
, occurs and finally recovers to the quiesced signal level. If the disturbance signal
53
is not processed by a specific circuit, it will result in malfunction.
FIG. 2
illustrates a conventional hot swap structure. The conventional hot swap structure is implemented by a separate live insertion bus controller (LIBC)
70
, which comprises an interface
71
coupled to a system bus
72
, and a system bus controller (SBC)
73
. The separate live insertion bus controller
70
can be integrated into the system bus controller
73
. The feature card
74
,
75
,
76
, and
77
can be inserted into the connectors of the system bus
72
. The live insertion bus controller
70
manages the control of the system bus
72
by a interface
78
and the system bus controller
73
.
When a feature card is inserted, the live insertion bus controller
70
acquires accesss to the system bus
72
through the interface
78
with the system bus controller
73
. After the access to the system bus
72
has been acquired by the live insertion bus controller
70
and the live insertion bus controller
70
has taken over the control of the system bus
72
, the live insertion bus controller
70
drives a subset of the control signal of the system bus
72
. The control signal of the system bus
72
is not affected by the disturbance signal resulting from the live insertion. When the live insertion bus controller
70
is informed that the live insertion process has been completed, the system bus controller
73
again acquires control of the system bus
72
. The same procedural steps are performed in case of removal of a feature card.
Therefore, a mechanism is needed to define and control the start and end time for the live insertion bus controller
70
to become master of the system bus
72
. The feature card
74
,
75
,
76
, and
77
must generate an indicate signal which informs the live insertion bus controller
70
of the state of live insertion of the feature card. The indicate signal is generated by long and short stagger length contact pins for the electrical connection between the feature card and the system bus. As shown in
FIG. 3
, the feature card
74
comprises the pins
55
,
56
, and
57
. The point of time, when the feature card
74
is about to be inserted or has been completely removed, is indicated by the pin
55
. Correspondingly, when the feature card
74
has been completely inserted or is about to be removed, is indicated by the pin
57
.
There are some disadvantages in conventional hot swap. First, special pins and connectors are required for detecting insertion or removal of devices. Usually, the device can not comprise special pins and connectors. Second, an additional bus controller is necessary to take over system bus, to build up additional signal path. The hot swap structure is more complex. Therefore, a hot swap structure for general interface is needed.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a circuit system with a hot swap capability which does not require special pins or circuits and provides stability and efficiency.
To achieve the above objects, the present invention provides a hot swap circuit module. According to the embodiment of the invention, the hot swap circuit module includes a circuit board and a latch.
A hot swap circuit module is used for a circuit system having a backplane. The circuit board has plural pins for inserting into the backplane.
The latch, disposed on the circuit board, has a data input terminal for receiving an important signal, a control terminal for receiving a clock signal for latching the important signal.
When the hot swap circuit module is removed from the backplane or inserted into the backplane, the clock signal does not trigger such that the important signal is not output from an output terminal of the latch. The configuration of the circuit system is not affected by the hot swap action. The hot swap capability allows the replacement or addition of pluggable module without also requiring the circuit system to be powered down. This in turn enhances the continuous availability characteristics of the circuit system by allowing continued operation during service, change, or hardware upgrade operations.


REFERENCES:
patent: 5272584 (1993-12-01), Austruy et al.
patent: 5530302 (1996-06-01), Hamre et al.
patent: 5572395 (1996-11-01), Rasums et al.
patent: 5787261 (1998-07-01), Osaka et al.
patent: 5922060 (1999-07-01), Goodrum
patent: 6041375 (2000-03-01), Bass et al.

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