Active solid-state devices (e.g. – transistors – solid-state diode – Mosfet type gate sidewall insulating spacer
Reexamination Certificate
2005-08-30
2008-11-25
Louie, Wai-Sing (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Mosfet type gate sidewall insulating spacer
C257S202000, C257SE39006, C257SE51038, C257SE29170, C977S712000, C977S720000, C977S722000, C977S723000
Reexamination Certificate
active
07456508
ABSTRACT:
A hosting structure of nanometric components is described comprising a substrate, a first multi-spacer level comprising a first plurality of spacers including first conductive spacers parallel to each other, and at least a second multi-spacer level realized above said first multi-spacer level and comprising a second plurality of spacers arranged transversally to said first plurality of spacers and including at least a lower discontinuous insulating layer and an upper layer, including in turn second conductive spacers. In particular, each pair of spacers of the second multi-spacer level defines with a spacer of the first multi-spacer level a plurality of nanometric hosting seats having at least a first and a second conduction terminal realized by portions of the first conductive spacers and of the second conductive spacers faced in the hosting seats. A method for manufacturing such a structure is also described.
REFERENCES:
patent: 5262336 (1993-11-01), Pike, Jr. et al.
patent: 5272114 (1993-12-01), van Berkum et al.
patent: 5500869 (1996-03-01), Yoshida et al.
patent: 5520244 (1996-05-01), Mundinger et al.
patent: 6365059 (2002-04-01), Pechenik
patent: 6897101 (2005-05-01), Weitz
patent: 6936891 (2005-08-01), Saito et al.
patent: 7142772 (2006-11-01), Blauvelt et al.
patent: 2002/0043690 (2002-04-01), Doyle et al.
patent: 2003/0059983 (2003-03-01), Ota et al.
patent: 2003/0104700 (2003-06-01), Fleming et al.
patent: 2004/0146863 (2004-07-01), Pisharody et al.
patent: 2005/0152180 (2005-07-01), Katti
patent: 2005/0249473 (2005-11-01), Page et al.
patent: 2006/0051919 (2006-03-01), Mascolo et al.
patent: 2006/0113587 (2006-06-01), Thies et al.
patent: 2007/0051994 (2007-03-01), Song et al.
patent: 101 23 364 (2002-11-01), None
patent: 102 47 679 (2004-04-01), None
patent: 0 313 493 (1989-04-01), None
patent: 1 278 234 (2003-01-01), None
patent: WO 99/04440 (1999-01-01), None
patent: WO 02/35580 (2002-05-01), None
patent: WO 02/37571 (2002-05-01), None
patent: WO 03/005369 (2003-01-01), None
Cerofolini Gianfranco
Mascolo Danilo
Rizzotto Gianguido
Armand Marc
Hen Hai
Jorgenson Lisa K.
Louie Wai-Sing
Seed IP Law Group PLLC
LandOfFree
Hosting structure of nanometric elements and corresponding... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Hosting structure of nanometric elements and corresponding..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hosting structure of nanometric elements and corresponding... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4028558