Host memory interface for a parallel processor

Details Host memory interface for a parallel processor Host memory interface for a parallel processor

2007-03-09

2008-09-09

Ellis, Kevin (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S202000, C712S028000

Reexamination Certificate

active

07424581

ABSTRACT:
A memory interface for a parallel processor which has an array of processing elements and can receive a memory address and supply the memory address to a memory connected to the processing elements. The processing elements transfer data to and from the memory at the memory address. The memory interface can connect to a host configured to access data in a conventional SDRAM memory device so that the host can access data in the memory.

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