Host initiated PCI burst writes utilizing posted write buffers

Details Host initiated PCI burst writes utilizing posted write buffers Host initiated PCI burst writes utilizing posted write buffers

1998-02-11

1999-08-24

An, Meng-Ai T.

Electrical computers and digital data processing systems: input/

Input/output data processing

Data transfer specifying

710126, 710128, 710100, G06F 1300

Patent

active

059419601

ABSTRACT:
A bridge logic takes write cycles that appear one at a time as an address followed by an associated data word on a host bus, detects consecutive addresses, and uses this information to create burst cycles on a peripheral control interface (PCI) bus that has protocols that allow burst cycles.

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