Computer graphics processing and selective visual display system – Display peripheral interface input device – Light pen for fluid matrix display panel
Reexamination Certificate
1999-04-12
2001-10-16
Saras, Steven (Department: 2675)
Computer graphics processing and selective visual display system
Display peripheral interface input device
Light pen for fluid matrix display panel
C345S182000, C345S212000, C345S214000
Reexamination Certificate
active
06304253
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an interface between personal computers and liquid crystal display (LCD) monitors, and more particularly to a horizontal position control circuit for high-resolution LCD monitors.
2. Background Art
Flat panel displays such as liquid crystal display and plasma display are considered as a substitute for cathode ray tube (CRT) displays for their compactness and low power consumption. Today, laptop and notebook computers chiefly use liquid crystal displays. Occasionally, a desktop computer system is equipped with a LCD monitor, although it is costly. Today's LCD panels adopt active matrix design, commonly referred to as thin film transistor (TFT) technology. This style of LCD puts a transistor at every pixel. The advantage of the active matrix design is that a smaller current needs to traverse the horizontal and vertical grid, so the pixel can be switched on and off faster.
LCD monitors include an interface circuit that converts analog video signals input from the system host into digital video signals for driving every pixel of the LCD panel. This compels LCD monitors to operate in a single display mode among the VGA(Video Graphic Array), SVGA(Super VGA), XGA(Extended Graphic Array), and SXGA(Super XGA) modes. Thus, the resolution of LCD monitors depends on the number of pixels formed in the active matrix which constitutes the active display area. For example, standard SXGA mode LCD monitors exactly have 1280×1024 pixels in the active display area. Unlike CRT monitors that require a bandwidth wide enough to address each individual screen dot plus an extra margin to allow for retrace times, the LCD monitor requires more precise control of input video signals for enabling the horizontal positioning that places the first pixel data on the first pixel of each individual scan line of the LCD screen.
Further, the resolution of LCD monitors needs to be increased in the personal computer and workstation to obtain sharper displayed images. The higher the resolution, the higher the bandwidth (dot-clock). However, the increase of resolution is limited due to the change characteristics of TFT-LCD, properties of driver ICs (integrated circuits), and response characteristics of various electronic devices in the LCD interface board. It has been known in the art that on the printed circuit board the bandwidth is limited to 135-140 MHZ due to an inherent parasitic capacitance. For the XGA mode LCD monitors, the bandwidth is about 60-80 MHZ and this is sufficient for the LCD monitors to process the XGA level input video signals. As to the SXGA mode LCD monitors the bandwidth will be more than about 160 MHZ, to fit a 90 Hz refresh rate. At this time, the period of one dot clock will be about 6.2 nS.
Conventionally, horizontal positioning is performed such that the sampling position is adjusted by the amount of &pgr;/2 by combining an encode clock with data synchronizing signals of the LCD interface circuit, thereby enabling adjustment of one pixel per dot clock. With this method, a maximum of 4 pixels are adjustable. However, for a higher synchronizing frequency range, the adjustable range should be often or more pixels. Thus, it is difficult to adjust the horizontal position in the higher frequency range video signals with the conventional method.
Therefore, there is a need to provide an interface circuit which can facilitate controlling of the horizontal position in LCD monitors depending on input video signals with a high synchronizing frequency range of about a 90 Hz refresh rate.
Known apparatus and methods for producing a digital video signal from an analog video for display on an LCD is described in U.S. Pat. No. 5,539,473 to Steven J. Komnmruscb et al. entitled
Dot Clock Generation With Minimal Clock Skew
; and U.S. Pat. Nos. 5,805,233 and 5,767,916 both to Michael G. West and entitled
Method And Apparatus For Automatic Pixel Clock Phase And Frequency Correction In Analog To Digital Video Signal Conversion
describe automatic correction of the horizontal position of a video image on the LCD.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a horizontal position control circuit of a LCD interface circuit which can effectively control a horizontal position in high-resolution LCD monitors.
In accordance with the present invention, the horizontal position control circuit comprises a key pad for adjusting a horizontal position of an image displayed; a key input controller for invoking a horizontal position control signal in response to input key signal; an analog-to-digital converter for dividing analog video signals by 2N (where N is an integer) and for converting the divided analog video signals into corresponding digital video data; a frame memory for storing the digital video data output from the analog-to-digital converter; and a controller in response to the horizontal position control signal to adjust a sampling point of the analog-to-digital converter (ADC) so that the horizontal position is adjusted by unit pixel, and to adjust output timing of write enable signals directed to the frame memory so that the horizontal position is adjusted by multiple pixels.
The horizontal position controller performs a fine adjustment operation and coarse adjustment operation. In the fine adjustment mode, the horizontal position is adjusted by the unit pixel, and in the coarse adjustment it is adjusted by multiple pixels. The fine adjustment is performed by controlling the sampling point of an ADC block, while the coarse adjustment is performed by controlling write cycles of a frame memory block.
According to this invention, the interface circuit effectively controls horizontal position of an image displayed in high-resolution LCD monitors above standard SXGA mode. Further, the coarse adjustment function of the horizontal position controller is applicable for the UXGA (Ultra XGA) display mode LCD monitors operated with about 200 MHZ bandwidth input video signals.
REFERENCES:
patent: 5539473 (1996-07-01), Kommrusch et al.
patent: 5767916 (1998-06-01), West
patent: 5790096 (1998-08-01), Hill, Jr.
patent: 5805233 (1998-09-01), West
patent: 6052118 (2000-04-01), Beeteson et al.
patent: 6078361 (2000-06-01), Reddy
Chung Seong-eun
Sung Jun-Ho
Alphonse Fritz
Bushnell , Esq. Robert E.
Samsung Electronics Co,. Ltd.
Saras Steven
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