Historical information storage for integrated circuits

Details Historical information storage for integrated circuits Historical information storage for integrated circuits

2002-09-24

2004-03-16

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S236000

Reexamination Certificate

active

06707699

ABSTRACT:

BACKGROUND OF THE INVENTION
Non-volatile memory ICs, such as ferroelectric or magnetic memories, have only been recently available on the market or still under development. Aging of such ICs depends strongly on their history, such as usage and environmental conditions. It is important for developers to have detailed and accurate information to correctly characterize the ICs. Additionally, historical information from customer or end user returns are important to develop long term reliability data used to understand and improve IC design.
Conventionally, historical information can only be collected manually by customers or end users. However, manual collection of information can be prone to mistakes. Furthermore, certain information, such as which cell or device is accessed, may not be amenable to manual tracking.
From the foregoing discussion, it is desirable to provide an easy and accurate way of collecting historical information.
SUMMARY OF INVENTION
The present invention pertains to implementation of an information recorder in an IC. In one embodiment, the IC comprises a non-volatile memory IC, such as ferroelectric or magnetic memories. In one embodiment, the information recorder comprises a counter circuit coupled to a latch. The counter receives an event signal. Each time the event signal is received, the counter increments the count. The count value is stored in the latch. The event signal represents an occurrence of an event which is to be tracked. For example, the event could a memory access, length of time powered up, temperature, or pressure experienced by the IC. The count value can be retrieved from the latch to assist in failure analysis and device characterization.


REFERENCES:
patent: 5872738 (1999-02-01), Yamashiroya
patent: 5892715 (1999-04-01), Hirata et al.

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