Highly selective, highly uniform plasma etch process for spin-on

Details Highly selective, highly uniform plasma etch process for spin-on Highly selective, highly uniform plasma etch process for spin-on

1995-08-29

1996-08-27

Breneman, R. Bruce

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

1566461, 1566431, H01L 2100

Patent

active

055497861

ABSTRACT:
An SOG plasma etch process is presented which is optimized for selectivity to PECVD silicon nitride. The present process also produces a uniform etch across the exposed surface of a semiconductor wafer. The etch process finds utility in dielectric-SOG-dielectric structures used as passivation layers. Silicon nitride is deposited using a PECVD technique to form the dielectric layers. By etching SOG at a faster rate than the rate at which it etches PECVD silicon nitride, the SOG plasma etch process removes enough of the SOG layer to prevent delamination problems associated with SOG layers interposed between dielectric layers without significantly reducing the thickness of the first dielectric layer. SOG remains only in troughs between closely-spaced interconnects and adjacent to the vertical steps between widely-spaced interconnects. Flow rates of He, CHF.sub.3, and N.sub.2 gases are established through a reaction chamber of a plasma etch system. The method includes pre-stabilizing steps, followed by an etch step, which is then followed by a post-stabilizing step and a particle removal or by-product flush step.

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"Silicon Processing For The VLSI Era--vol. 1--Process Technology"; Wolf et al.; Lattice Press; Sunset Beach, Calif. .COPYRGT.1986; pp. 233-236.

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