Highly manufacturable SRAM cells in substrates with hybrid...

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor

Reexamination Certificate

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Details

C257S288000, C257S627000, C257S628000, C257S903000, C257SE27098, C257SE21661, C365S156000, C365S182000, C438S142000, C438S198000, C438S199000, C438S213000, C438S478000, C438S479000, C438S973000

Reexamination Certificate

active

07605447

ABSTRACT:
The present invention relates to a semiconductor device structure that includes at least one SRAM cell formed in a substrate. Such SRAM cell comprises two pull-up transistors, two pull-down transistors, and two pass-gate transistors. The pull-down transistors and the pass-gate transistors are substantially similar in channel widths and have substantially similar source-drain doping concentrations, while the SRAM cell has a beta ratio of at least 1.5. The substrate preferably comprises a hybrid substrate with at two isolated sets of regions, while carrier mobility in these two sets of regions differentiates by a factor of at least about 1.5. More preferably, the pull-down transistors of the SRAM cell are formed in one set of regions, and the pass-gate transistors are formed in the other set of regions, so that current flow in the pull-down transistors is larger than that in the pass-gate transistors.

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