Highly compact memory device with nonvolatile vertical transisto

Details Highly compact memory device with nonvolatile vertical transisto Highly compact memory device with nonvolatile vertical transisto

1994-11-08

1998-04-14

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257320, H01L 2906, H01L 2968

Patent

active

057395675

ABSTRACT:
A highly compact nonvolatile solid state memory core is provided that stores and reproduces both digital and analog signals for multimedia applications. The memory core includes vertical electrically erasable and programmable read only memories (EEPROM) cells having, for example, a stacked gate or a split channel configuration. An array of EEPROM cells on the same chip is prewritten and is used as a reference for digital-analog conversions and for memory cell programming. An intelligent write method allows each memory cell to either store an analog signal or multiple digital signals. Based on the previously stored signal, the intelligent write method determines whether to charge or to discharge the floating gate associated with the selected memory cell. Thus, full erasure is not required prior to programming each memory cell. The present invention significantly increases the density of memory cell arrays while prolonging the useful life of the array.

REFERENCES:
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F. Masuoka, M. Asano, H. Iwahashi, T. Komuro and S. Tanaka, "A New Flash E.sup.2 PROM Cell Using Triple Polysilicon Technology", pp. 464-467, Integrated Circuit Div. Toshiba Corp., 1983 IDEM.
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