Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Smart card package
Reexamination Certificate
2001-02-15
2003-04-22
Cuneo, Kamand (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Smart card package
C257S685000, C257S723000, C257S777000, C361S761000
Reexamination Certificate
active
06552423
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor memory card.
2. Description of the Related Arts
A very small and light memory card used for storing and retrieving data for digital products such as a MP3 player or a digital camera is called “smart media card”. Generally, the memory card contains non-volatile memory chips such as NAND-type or NOR-type flash memory chips and, if necessary, a controller chip.
Memory density, i.e., memory storage capacity, of the current memory card is several tens or hundreds of mega-bits. However, an increase of the memory density has been constantly required to keep up with rapid developments in modem digital technology. However, the rate of the increase of the memory density has not been sufficient. Thus, new and useful approaches to increase the memory density of the memory card are also required in addition to relying on the increase of the memory density of the memory chips.
One such approach to increasing the memory density of the memory card is to use a plurality of identical memory chips. For example, as shown in
FIG. 1
, two memory chips
13
are stacked, or as shown in
FIG. 2
, two memory chips
23
are mounted side by side.
With reference to
FIGS. 1 and 2
, conventional memory card
10
or
20
has a structure where memory chips
13
or
23
are mounted within a package
11
or
21
, and the packages
11
or
21
are positioned on a card body
12
or
22
, i.e., “a base card.” Herein, a printed circuit board
14
or
24
is used in the package
11
or
21
, and the memory chips
13
or
23
are mounted on one of the surfaces of the printed circuit board
14
or
24
and a plurality of contact pads
15
or
25
are formed on the other surface of the printed circuit board
14
or
24
. The memory chips
13
or
23
are electrically interconnected to the printed circuit board
14
or
24
by wire bonding or flip chip bonding and to the contact pads
15
or
25
through the wiring patterns and the via holes (not shown) of the printed circuit boards
14
or
24
. The memory chips
13
or
23
are encapsulated with a molding resin
16
,
26
. As shown in
FIG. 1
, a controller chip
17
may be additionally used.
In the above-described conventional memory cards
10
or
20
it is difficult to mount more than two memory chips, unless the sizes of the memory chips
13
or
23
are reduced. Therefore, the density of the memory card as a whole cannot exceed twice the density of one memory chip.
Particularly, as shown in
FIG. 1
, the upper chip
13
a
should be off-set from an edge of the underlying lower chip
13
b
so as to expose the chip pads
18
b
of the lower chip
13
b
for electrical interconnection. Moreover, the chip pads
18
a
or
18
b
should be formed on the upper surface of each chip
13
a
or
13
b
along only one of the edges. In addition, the chip pads
18
a
,
18
b
of the upper and the lower chips
13
a
,
13
b
, respectively, perform the same function and are connected to pads
14
a
formed on the substrate via wire bonding. Therefore, the size of the pads
14
a
should be sufficiently large so that both the upper and lower bonding wires
19
can be electrically connected in common thereto. In the structure shown in above-described memory card
10
, it is difficult to stack more than two memory chips
13
due to the following problems.
First, when the chips are stacked as shown in
FIG. 1
, more side space within the package is required if more chips are being stacked. However, in a standard memory card, the available space is very limited. Thus, the number of chips that can be stacked is restricted.
Second, if more chips are stacked, longer bonding wires should be used. However, the longer bonding wires may result in undesirable electrical shorts between adjacent wires by, for example, wire sweeping, a problem that is well known in the art.
Third, the warpage of the printed circuit board becomes serious due to the difference in the coefficient of thermal expansion between the chips and the board. Several problems such as delamination on interface, poor adhesion, difficulty in stacking of chips, are caused by the warpage.
Fourth, a package containing multiple chips may sometimes fail electrical or burn-in test steps due to one defective chip therein although the other chips are good. This causes great losses in yield, and therefore a so-called known good die (KGD) which is an unpackaged die that has been tested to a quality and reliability level equal to the packaged product before packaging are required for the multi-chip package.
Another conventional memory card as shown in
FIG. 2
has been proposed to provide a solution to some of the problems described above, since chips are mounted side-by-side on the board without stacking. However, this memory card structure still has the above-mentioned problems, e.g., poor yield, because a single package includes multiple chips. Further, unless the size of the memory chip
23
is reduced, there still remains a drawback in that that the number of the memory chips mounted side-by-side within the package
21
that can be loaded is limited.
SUMMARY OF THE INVENTION
The present invention increases memory density of a memory card by improving the structure of the memory card. Particularly, the number of the memory chips within the memory card can be increased even without reducing the size of the memory chip or increasing the density of the memory chip.
The present invention further prevents several problems in the manufacturing process or the test process caused by using a plurality of the memory chips.
According to one embodiment of the present invention, a memory card comprises a base card and two packages connected to the base card. The two packages are attached to the base card and face each other. With reference to the two packages, a first package comprises a first substrate and at least one memory chip, and a second package comprises a second substrate and at least one memory chip. A first surface of the first substrate has external connection pads formed thereon and is exposed from the memory card. A second surface of the first substrate has first connection pads formed thereon and connected to the base card. The memory chips are mounted on the second surface and electrically connected to each other. A third surface of the second substrate is exposed from the memory card, and a fourth surface of the second substrate has second connection pads formed thereon and connected to the base card. The memory chips are mounted on the fourth surface and electrically connected to each other. The base card includes internal connection means, and the first and the second connection pads are electrically connected to the internal connection means. The external connection pads provide electrical connection between said internal connection means to an external system.
By connecting two packages to the base card, the memory card of the present invention can increase the memory density of the smart cart four times or more. Also, the problems encountered in the conventional smart card manufacturing process or the test process can be prevented.
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patent: 5530292 (1996-06-01), Waki et al.
patent: 5583748 (1996-12-01), Gochi et al.
patent: 5910685 (1999-06-01), Watanabe
patent: 5939779 (1999-08-01), Kim
patent: 6262488 (2001-07-01), Masayuki et al.
patent: 6297960 (2001-10-01), Moden et al.
patent: 6222265 (2002-04-01), Akram et al.
patent: 6369444 (2002-04-01), Degani et al.
patent: 6239496 (2002-05-01), Asada
patent: 6383845 (2002-05-01), Masuda et al.
Kim Young-Soo
Kwon Young-Shin
Song Young-Jae
Youm Kun-Dae
Cruz Lourdes
Cuneo Kamand
Marger & Johnson & McCollom, P.C.
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