High withstanding voltage MIS transistor

Details High withstanding voltage MIS transistor High withstanding voltage MIS transistor

1991-04-03

1993-06-01

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257339, 257369, H01L 2976, H01L 2994

Patent

active

052162729

ABSTRACT:
A high withstanding voltage MIS transistor, including an offset region and a double offset region in a region of a semiconductor substrate. The region of the semiconductor substrate has a first conductivity type. The offset region connects to a drain region, and has a second conductivity type. An impurity concentration of the offset region is lower than that of the drain region. The double offset region has the first conductivity type. At least a portion of the double offset region overlaps with the offset region. An impurity concentration of the double offset region is higher than that of the region of the semiconductor substrate. The disclosed structure has an improved current gain of the MIS transistor is improved.

REFERENCES:
patent: 4173818 (1979-01-01), Bassous et al.
patent: 4729001 (1988-03-01), Haskell
patent: 4819045 (1989-04-01), Murakami
patent: 4933730 (1990-06-01), Shirato
patent: 4949136 (1990-08-01), Jain
patent: 4968639 (1990-11-01), Bergonzoni
patent: 5023190 (1991-06-01), Lee et al.
Yoshida, I., Device Design of an Ion Implanted High Voltage MOSFET, Proceedings of the 6th Conference on Solid State Devices, Tokyo 1974, Supplement to the Journal of the Japan Society of Applied Physics, vol. 44, 1975, pp. 249-255.
Nikkei Electronics 1976.5.31 p. 66-p. 77 Published on Jun. 25, 1987.
Proceedings of the 6th. Conference on Solid State Devices, Tokyo, 1974 Supplement to the Journal of the Japan Society of Applied Physics, vol. 44, 1975 P249-P255 "Device Design of an Ion Implanted High Voltage MOSFET" published in 1974 or 1975.

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