High voltage tolerant CMOS input/output circuit

Electronic digital logic circuitry – Interface – Supply voltage level shifting

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Details

326 68, H03K 190175, H03K 19094

Patent

active

055437338

ABSTRACT:
An input/output circuit communicates an external input signal to an internal signal and converts an internal signal to an external output signal. In one embodiment, the input/output circuit has a power supply terminal, and an input terminal that is coupled to an output terminal via a conductor. A pull-up circuit is coupled to the power supply terminal and the conductor, and includes a PMOS transistor having an N-well, where the pull-up circuit is configured to selectively pull-up the output signal. A pull-down circuit is coupled to a ground terminal and the conductor, and is configured to selectively pull-down the output signal. A comparison and logic control circuit is coupled to the power supply terminal and to the conductor, and is configured to compare a supply voltage level to the input signal and is configured to generate an affirmative logic signal when the input signal is greater than the supply voltage level and to generate a negative logic signal when the input signal is less than the supply voltage level. An N-well control circuit is coupled to the power supply terminal, to the conductor and to the pull-up circuit, where the N-well control circuit is responsive to the logic signal, and is configured to output a control N-well signal to control the PMOS transistor N-well voltage.

REFERENCES:
patent: 5017811 (1991-05-01), Worley
patent: 5442307 (1995-08-01), Shigehara et al.
patent: 5448198 (1995-09-01), Toyoshima et al.
patent: 5450025 (1995-09-01), Shay
patent: 5451889 (1995-09-01), Hiem et al.

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