High voltage stress test circuit

Details High voltage stress test circuit High voltage stress test circuit

2009-01-13

2010-02-16

Le, Don P (Department: 2819)

Electronic digital logic circuitry

Interface

Logic level shifting

C326S081000

Reexamination Certificate

active

07663402

ABSTRACT:
A high voltage stress test circuit includes an internal data generation unit for generating internal data and inverted internal data, and a level shifter for receiving the internal data and the inverted internal data and for generating digital data and inverted digital data. In a normal mode, the internal data and the inverted internal data have logic states corresponding to input data, while the digital data and the inverted digital data have logic states corresponding to the internal data and the inverted internal data. In a high voltage stress test mode, the internal data and the inverted internal data have predetermined logic states regardless of a logic state of the input data, while the digital data and the inverted digital data have predetermined logic states regardless of logic states of the internal data and the inverted internal data.

REFERENCES:
patent: 7161387 (2007-01-01), Yamasaki et al.
patent: 2005/0280461 (2005-12-01), Teraishi
patent: 2007/0085591 (2007-04-01), Teraishi
patent: 10-2006-0118414 (2006-11-01), None
patent: 10-2006-0123780 (2006-12-01), None
patent: 10-2007-0019882 (2007-02-01), None
patent: 10-2007-0056798 (2007-06-01), None

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