High voltage semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257491, 257409, 257544, H01L 2976, H01L 2358, H01L 2994, H01L 2900

Patent

active

060435348

ABSTRACT:
An N.sup.- - region is formed by diffusion on a P- semiconductor substrate, and a P- region is formed in a surface portion of the N.sup.- - region. A P.sup.+ - region is formed in an outer peripheral portion of the N.sup.- - region, to suppress expansion of a depletion layer of the P- semiconductor substrate when a high voltage is applied. A gate oxide film is formed on the semiconductor substrate, and a gate electrode of polycrystalline silicon is formed on the gate oxide film, particularly on a channel region which is formed by the semiconductor substrate and the P.sup.+ - region, which is as a whole the same as a structure of a lateral N-channel MOSFET. Circuit elements are formed within the N.sup.- - region, and a high voltage is applied. Circuit portions are isolated as the gate electrode and a source region are grounded. This reduces the number of steps for manufacturing a high-insulation IC, increases a breakdown voltage, and integrates the circuit denser.

REFERENCES:
patent: 4811075 (1989-03-01), Eklund

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