High voltage negative charge pump with low voltage CMOS transist

Details High voltage negative charge pump with low voltage CMOS transist High voltage negative charge pump with low voltage CMOS transist

1994-04-26

1995-06-06

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327536, 36518909, 363 59, G05F 316, G05F 126

Patent

active

054225906

ABSTRACT:
A system for erasing a memory array in a memory has a supply voltage and a negative charge pump. The negative charge pump system includes (a) circuitry to select a memory array to be erased; (b) for circuitry to switch on the supply voltage Vnn for the charge pump; (c) circuitry to pump the supply voltage Vnn with the charge pump to produce a pumped negative voltage; (d) circuitry to erase the selected array with the pumped negative voltage; (e) circuitry to provide the pumping; and (f) circuitry to provide a discharge path for voltages trapped in the charge pump.

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patent: 5140182 (1992-08-01), Ichimura
patent: 5168174 (1992-12-01), Naso et al.
patent: 5347171 (1994-09-01), Cordoba et al.

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