High voltage metal oxide silicon field effect transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257434, 257347, 257490, 438288, 438290, 438297, H01L 2900

Patent

active

058313206

ABSTRACT:
A manufacturing method of high voltage MOSFET includes a process forming the first and second conductive wells in a semiconductor substrate; process forming drift areas in the first and second conductive wells; process growing an isolation membrane on the substrate surface between the first and second conductive wells; process forming a gate insulation film; process forming a gate on the gate insulation film above the first and second conductive wells; process forming low concentration n- and p-type dopant areas in the drift areas of the parts adjacent to the gate; process forming buried diffusion areas in the first and second conductive wells; process forming source/drain having a body contact on a side on the buried diffusion areas in the first and second conductive wells; process forming an insulation film having a contact formed in such way that is exposed the surface of source/drain on the entire surface of the substrate including the gate and isolation membrane; process forming a metal film on the insulation film; and process forming source/drain electrodes and the metal field plates, by etching the metal film using a mask.

REFERENCES:
Kwon, O-K, et al., "Optimized 60-V Lateral DMOS Devices for VLSI Power Applications," 1991 Symposium on VLSI Technology, Oiso, Japan, pp. 115-116 .

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