High-voltage lateral DMOS device

Details High-voltage lateral DMOS device High-voltage lateral DMOS device

2007-11-05

2009-02-10

Pham, Thanh V. (Department: 2894)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S336000, C257SE21417

Reexamination Certificate

active

07489007

ABSTRACT:
All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.

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