High voltage input buffer

Details High voltage input buffer High voltage input buffer

2008-06-03

2008-06-03

Cho, James (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S034000, C326S068000, C326S087000

Reexamination Certificate

active

07382159

ABSTRACT:
An input buffer circuit includes a voltage limiting circuit and a protection circuit coupled between a pull-up component and a pull-down component of a level detecting circuit. The voltage limiting circuit receives an input signal at a first voltage range and limits the input signal to a safe voltage range, the first voltage range being between an electrical ground and a first supply voltage level, and the safe voltage range being between the electrical ground and a second supply voltage level. The level detecting circuit has a pull-up component receiving the input signal directly from the input terminal and a pull-down component receiving the safe voltage range from the voltage limiting circuit. The level detecting circuit transitions the input signal from the first voltage range to the input signal at the second voltage range. The protection circuit is coupled in series between the pull-up component and the pull-down component so as to protect the level detecting circuit from gate oxide overstress.

REFERENCES:
patent: 5973900 (1999-10-01), Sher
patent: 6069515 (2000-05-01), Singh
patent: 6342996 (2002-01-01), Drapkin et al.
patent: 6943587 (2005-09-01), Joshi et al.
patent: 7205823 (2007-04-01), Chen
patent: 2006/0119416 (2006-06-01), Fung et al.

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