High voltage generator having a self-timed clock circuit and cha

Details High voltage generator having a self-timed clock circuit and cha High voltage generator having a self-timed clock circuit and cha

1993-01-11

1994-08-09

LaRoche, Eugene R.

Static information storage and retrieval

Powering

Conservation of power

3072964, 36518909, G11C 700

Patent

active

053372840

ABSTRACT:
A voltage generator for low power applications includes a circuit for generating, controlling and maintaining a high voltage for low power applications in an integrated circuit. The circuit includes separate standby and active circuits for pumping V.sub.CCP of a DRAM under different circumstances. The standby and active circuits operate independently of one another, but may operate simultaneously, to pump charge to V.sub.CCP. The standby circuit is generally a low power circuit activated in response to power up and leakage current conditions to maintain V.sub.CCP. The active circuit is generally a larger circuit and can pump more current. The active circuit is generally responsive to the word lines being driven. Accordingly, the voltage generator can maintain V.sub.CCP while minimizing power consumption in DRAM.

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Martino, Jr., et al., An On-Chip Back-Bias Generator for MOS Dynamic Memory, IEEE Journal of Solid-State Circuits, Oct. 1980, at 620-625.
Gillingham et al., "High-Speed, High-Reliability Circuit Design for Megabit DRAM" IEEE Journal of Solid-State Circuits, vol. 26, No. 8, Aug. 1991.
R. C. Foss et al. "Application of High Voltage Pumped Supply for Low-Power DRAM." Symposium on VLSI Circuits, Digest of Technical Papers, (1992).

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