High voltage generating circuit and method

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Reexamination Certificate

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C365S189090

Reexamination Certificate

active

06690613

ABSTRACT:

This application claims priority from Korean Patent Application No. 2001-9331, filed on Feb. 23, 2001, the entirety of which is incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a high voltage generating circuit and method.
2. Description of Related Art
Apparatus using a battery as a power source generally include a high voltage generating circuit that internally generates a voltage higher than a battery voltage. Likewise, typical semiconductor memory devices include a high voltage generating circuit that generates a voltage level higher than an externally applied power voltage.
A typical high voltage generating circuit includes a standby high voltage generating circuit that operates in both standby and active modes and an active high voltage generating circuit that operates only in active mode. Of these, the active high voltage generating circuit boosts a high voltage to a desired level responsive to an active command.
FIG. 1
is a block diagram illustrating a high voltage generating circuit. The high voltage generating circuit of
FIG. 1
includes a standby high voltage generating circuit
100
and an active high voltage generating circuit
200
. The standby high voltage generating circuit
100
includes a standby high voltage detecting circuit
10
, an oscillator
12
, and a standby high voltage step-up circuit
14
. The active high voltage generating circuit
200
includes an active high voltage detecting circuit
20
, a pulse generating circuit
22
and an active high voltage step-up circuit
22
. The standby high voltage detecting circuit
10
determines whether a level of a high voltage VPP is lower than a desired or predetermined voltage level to thereby generate a standby high voltage level detecting signal VPPS. The oscillator
12
oscillates responsive to the standby high voltage level detecting signal VPPS to thereby generate a pulse signal OSC. The standby high voltage step-up circuit
14
boosts a level of the high voltage VPP responsive to the pulse signal OSC.
The active high voltage detecting circuit
20
detects whether a level of the high voltage VPP is lower than a desired level to thereby generate an active high voltage level-detecting signal VPPA responsive to an active command ACT. The pulse signal generating circuit
22
generates pulse signals P
1
and P
2
responsive to the active command ACT and the high voltage level detecting signal VPPA is generated. The active high voltage step-up circuit
24
boosts the high voltage VPP responsive to the pulse signals P
1
and P
2
.
A predetermined time period is required until the active command ACT is applied and a level of the high voltage VPP is detected. During this predetermined time period, a level of the high voltage VPP is stepped down. Therefore, a level of the high voltage VPP cannot be compensated directly after the active command ACT is applied.
FIG. 2
is a block diagram illustrating another embodiment of a high voltage generating circuit. The high voltage generating circuit of
FIG. 2
includes a standby high voltage generating circuit
100
and an active high voltage generating circuit
210
. The standby high voltage generating circuits of
FIGS. 1 and 2
have like configuration. The active high voltage generating circuit
210
includes an active high voltage detecting circuit
30
, a pulse signal generating circuit
32
, a first active high voltage generating circuit
34
, and a second high voltage generating circuit
36
.
The active high voltage detecting circuit
30
generates the high voltage level detecting signal VPPA when a level of the high voltage VPP is lower than a desired level responsive to an active command ACT. The pulse signal generating circuit
32
generates pulse signals p
1
and p
2
when the active command ACT is applied. Likewise, the pulse signal generating circuit
32
generates pulse signals P
1
and P
2
responsive to the active command ACT and the high voltage level detecting signal VPPA. The first active high voltage generating circuit
34
boosts the high voltage VPP responsive to the pulse signals p
1
and p
2
. The second active high voltage generating circuit
36
boosts the high voltage VPP responsive to the pulse signals P
1
and P
2
.
That is, the first active high voltage generating circuit
34
boosts the high voltage VPP responsive to the pulse signals p
1
and p
2
generated by the pulse signal generating circuit
32
and responsive to the active command ACT. The second active high voltage generating circuit
36
boosts the high voltage VPP responsive to the pulse signals P
1
and P
2
generated by the pulse signal generating circuit
32
. The second active high voltage generating circuit
36
boosts the high voltage VPP also responsive to the high voltage level detecting signal VPPA generated by the active high voltage detecting circuit
30
.
Therefore, the high voltage generating circuit of
FIG. 2
has an advantage in that the first active high voltage generating circuit
34
operates directly after receiving the active command ACT to immediately boost the high voltage VPP.
However, if the first and second high voltage generating circuits
34
and
36
, respectively, are designed considering receiving a low boosting ability power voltage where a high power voltage is applied, the first and second high voltage generating circuits
34
and
36
come to have a high voltage boosting ability and, therefore, the high voltage may be boosted higher than the desired voltage.
That is, since a voltage boosting ability of the high voltage generating circuit of
FIG. 2
differs according to the power voltage level, the level of the high voltage VPP also differs.
SUMMARY OF THE INVENTION
It is an object of the present invention to overcome disadvantages associated with prior art circuits.
It is another object of the present invention to provide a high voltage generating circuit that can provide a stable high voltage regardless of a level of a high voltage input.
It is another object of the present invention to provide a method of generating a high voltage in which a stable high voltage can be provided regardless of a level of a high voltage input.


REFERENCES:
patent: 5337284 (1994-08-01), Cordoba et al.
patent: 5796293 (1998-08-01), Yoon et al.

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