Static information storage and retrieval – Systems using particular element – Flip-flop
Patent
1993-06-15
1994-05-24
LaRoche, Eugene R.
Static information storage and retrieval
Systems using particular element
Flip-flop
365154, 36518911, G11C 1140
Patent
active
053155459
ABSTRACT:
According to a first aspect of the present invention, a static random access memory cell according to the present invention includes two stages. The first stage has a first P-Channel MOS transistor with its source connected to a high-voltage supply rail, and its drain connected to the drain of a first N-Channel MOS transistor. The source of the first N-Channel MOS transistor is connected to the drain of a second N-Channel MOS transistor. The source of the second N-Channel MOS transistor is connected to a V.sub.SS power supply rail. The second stage has a second P-Channel MOS transistor with its source connected to the high-voltage supply rail V.sub.HS, and its drain connected to the drain of a third N-Channel MOS transistor. The source of the third N-Channel MOS transistor is connected to the drain of a fourth N-Channel MOS transistor. The source of the fourth N-Channel MOS transistor is connected to V.sub.SS. The gates of the first and second P-Channel MOS transistors are cross-coupled and the gates of the second and fourth N-Channel MOS transistors are cross-coupled. The gates of the first and third N-Channel MOS transistors are connected together to power supply rail V.sub.DD, usually 5 volts. The first and second P-Channel MOS transistors are formed in an n-well biased at a constant power supply voltage. In a preferred embodiment the constant power supply voltage may be V.sub.HS. A bit line coupled to the drain of the second N-Channel MOS transistor through a fifth N-Channel MOS transistor, having its gate connected to a word line.
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Guo Ta-Pan
Srinivasan Adi
Aptix Corporation
LaRoche Eugene R.
Yoo Do Hyun
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